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-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp14
1 files changed, 11 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 9746490988e..753008588fc 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -12357,8 +12357,13 @@ bool ARMTargetLowering::isLegalT2ScaledAddressingMode(const AddrMode &AM,
Scale = Scale & ~1;
return Scale == 2 || Scale == 4 || Scale == 8;
case MVT::i64:
+ // FIXME: What are we trying to model here? ldrd doesn't have an r + r
+ // version in Thumb mode.
// r + r
- if (((unsigned)AM.HasBaseReg + Scale) <= 2)
+ if (Scale == 1)
+ return true;
+ // r * 2 (this can be lowered to r + r).
+ if (!AM.HasBaseReg && Scale == 2)
return true;
return false;
case MVT::isVoid:
@@ -12416,8 +12421,11 @@ bool ARMTargetLowering::isLegalAddressingMode(const DataLayout &DL,
return isPowerOf2_32(Scale & ~1);
case MVT::i16:
case MVT::i64:
- // r + r
- if (((unsigned)AM.HasBaseReg + Scale) <= 2)
+ // r +/- r
+ if (Scale == 1 || (AM.HasBaseReg && Scale == -1))
+ return true;
+ // r * 2 (this can be lowered to r + r).
+ if (!AM.HasBaseReg && Scale == 2)
return true;
return false;
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