diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.h | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrAVX512.td | 27 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrFragmentsSIMD.td | 7 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86IntrinsicsInfo.h | 7 |
5 files changed, 45 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 0deda4c2f99..658302b7de6 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -25267,6 +25267,7 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const { case X86ISD::VPDPBUSDS: return "X86ISD::VPDPBUSDS"; case X86ISD::VPDPWSSD: return "X86ISD::VPDPWSSD"; case X86ISD::VPDPWSSDS: return "X86ISD::VPDPWSSDS"; + case X86ISD::VPSHUFBITQMB: return "X86ISD::VPSHUFBITQMB"; } return nullptr; } diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h index 3b1cc2e55af..6576bceffd2 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.h +++ b/llvm/lib/Target/X86/X86ISelLowering.h @@ -519,6 +519,9 @@ namespace llvm { COMPRESS, EXPAND, + // Bits shuffle + VPSHUFBITQMB, + // Convert Unsigned/Integer to Floating-Point Value with rounding mode. SINT_TO_FP_RND, UINT_TO_FP_RND, SCALAR_SINT_TO_FP_RND, SCALAR_UINT_TO_FP_RND, diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td index 6a87a264750..626ad00933c 100644 --- a/llvm/lib/Target/X86/X86InstrAVX512.td +++ b/llvm/lib/Target/X86/X86InstrAVX512.td @@ -10215,3 +10215,30 @@ defm VPOPCNTW : avx512_unary_rm_vl<0x54, "vpopcntw", ctpop, avx512vl_i16_info, HasBITALG>, avx512_unary_lowering<ctpop, avx512vl_i16_info, HasBITALG>, VEX_W; +multiclass VPSHUFBITQMB_rm<X86VectorVTInfo VTI> { + defm rr : AVX512_maskable_cmp<0x8F, MRMSrcReg, VTI, (outs VTI.KRC:$dst), + (ins VTI.RC:$src1, VTI.RC:$src2), + "vpshufbitqmb", + "$src2, $src1", "$src1, $src2", + (X86Vpshufbitqmb (VTI.VT VTI.RC:$src1), + (VTI.VT VTI.RC:$src2))>, EVEX_4V, T8PD; + defm rm : AVX512_maskable_cmp<0x8F, MRMSrcMem, VTI, (outs VTI.KRC:$dst), + (ins VTI.RC:$src1, VTI.MemOp:$src2), + "vpshufbitqmb", + "$src2, $src1", "$src1, $src2", + (X86Vpshufbitqmb (VTI.VT VTI.RC:$src1), + (VTI.VT (bitconvert (VTI.LdFrag addr:$src2))))>, + EVEX_4V, EVEX_CD8<8, CD8VF>, T8PD; +} + +multiclass VPSHUFBITQMB_common<AVX512VLVectorVTInfo VTI> { + let Predicates = [HasBITALG] in + defm Z : VPSHUFBITQMB_rm<VTI.info512>, EVEX_V512; + let Predicates = [HasBITALG, HasVLX] in { + defm Z256 : VPSHUFBITQMB_rm<VTI.info256>, EVEX_V256; + defm Z128 : VPSHUFBITQMB_rm<VTI.info128>, EVEX_V128; + } +} + +defm VPSHUFBITQMB : VPSHUFBITQMB_common<avx512vl_i8_info>; + diff --git a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td index 2eb735abd69..cb7c4306209 100644 --- a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td +++ b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td @@ -575,6 +575,13 @@ def X86compress: SDNode<"X86ISD::COMPRESS", SDTypeProfile<1, 1, def X86expand : SDNode<"X86ISD::EXPAND", SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>, SDTCisVec<1>]>, []>; +// vpshufbitqmb +def X86Vpshufbitqmb : SDNode<"X86ISD::VPSHUFBITQMB", + SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>, + SDTCisSameAs<1,2>, + SDTCVecEltisVT<0,i1>, + SDTCisSameNumEltsAs<0,1>]>>; + def SDTintToFPRound: SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisFP<0>, SDTCisSameAs<0,1>, SDTCisInt<2>, SDTCisVT<3, i32>]>; diff --git a/llvm/lib/Target/X86/X86IntrinsicsInfo.h b/llvm/lib/Target/X86/X86IntrinsicsInfo.h index bc1a5ec52fc..6f39568a808 100644 --- a/llvm/lib/Target/X86/X86IntrinsicsInfo.h +++ b/llvm/lib/Target/X86/X86IntrinsicsInfo.h @@ -1292,6 +1292,13 @@ static const IntrinsicData IntrinsicsWithoutChain[] = { X86_INTRINSIC_DATA(avx512_mask_vpshrdv_w_256, FMA_OP_MASK, X86ISD::VSHRDV, 0), X86_INTRINSIC_DATA(avx512_mask_vpshrdv_w_512, FMA_OP_MASK, X86ISD::VSHRDV, 0), + X86_INTRINSIC_DATA(avx512_mask_vpshufbitqmb_128, CMP_MASK, + X86ISD::VPSHUFBITQMB, 0), + X86_INTRINSIC_DATA(avx512_mask_vpshufbitqmb_256, CMP_MASK, + X86ISD::VPSHUFBITQMB, 0), + X86_INTRINSIC_DATA(avx512_mask_vpshufbitqmb_512, CMP_MASK, + X86ISD::VPSHUFBITQMB, 0), + X86_INTRINSIC_DATA(avx512_mask3_vfmadd_pd_128, FMA_OP_MASK3, ISD::FMA, 0), X86_INTRINSIC_DATA(avx512_mask3_vfmadd_pd_256, FMA_OP_MASK3, ISD::FMA, 0), X86_INTRINSIC_DATA(avx512_mask3_vfmadd_pd_512, FMA_OP_MASK3, ISD::FMA, |
