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-rw-r--r--llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp5
-rw-r--r--llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp3
2 files changed, 5 insertions, 3 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp b/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
index dd635232912..9f75ecb4c46 100644
--- a/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
@@ -219,8 +219,9 @@ static void removeKillInfo(MachineInstr *MI, unsigned RegNotKilled) {
/// isUnsafeToMoveAccross - Returns true if it is unsafe to move a copy
/// instruction from \p UseReg to \p DestReg over the instruction \p I.
-bool isUnsafeToMoveAccross(MachineInstr *I, unsigned UseReg, unsigned DestReg,
- const TargetRegisterInfo *TRI) {
+static bool isUnsafeToMoveAccross(MachineInstr *I, unsigned UseReg,
+ unsigned DestReg,
+ const TargetRegisterInfo *TRI) {
return (UseReg && (I->modifiesRegister(UseReg, TRI))) ||
I->modifiesRegister(DestReg, TRI) ||
I->readsRegister(DestReg, TRI) ||
diff --git a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
index 59b4fabe01d..41e382dc072 100644
--- a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
@@ -838,7 +838,8 @@ bool HexagonPacketizerList::RestrictingDepExistInPacket (MachineInstr* MI,
/// Gets the predicate register of a predicated instruction.
-unsigned getPredicatedRegister(MachineInstr *MI, const HexagonInstrInfo *QII) {
+static unsigned getPredicatedRegister(MachineInstr *MI,
+ const HexagonInstrInfo *QII) {
/// We use the following rule: The first predicate register that is a use is
/// the predicate register of a predicated instruction.
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