diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrThumb.td | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrThumb.td b/llvm/lib/Target/ARM/ARMInstrThumb.td index 891a8f482f0..2ae23fe1c05 100644 --- a/llvm/lib/Target/ARM/ARMInstrThumb.td +++ b/llvm/lib/Target/ARM/ARMInstrThumb.td @@ -997,6 +997,9 @@ let isAdd = 1 in { } } +def : tInstAlias <"add${s}${p} $Rdn, $Rm", + (tADDrr tGPR:$Rdn,s_cc_out:$s, tGPR:$Rdn, tGPR:$Rm, pred:$p)>; + def : tInstSubst<"sub${s}${p} $rd, $rn, $imm", (tADDi3 tGPR:$rd, s_cc_out:$s, tGPR:$rn, mod_imm1_7_neg:$imm, pred:$p)>; def : tInstSubst<"sub${s}${p} $rdn, $imm", @@ -1286,6 +1289,9 @@ def tSUBrr : // A8.6.212 [(set tGPR:$Rd, (sub tGPR:$Rn, tGPR:$Rm))]>, Sched<[WriteALU]>; +def : tInstAlias <"sub${s}${p} $Rdn, $Rm", + (tSUBrr tGPR:$Rdn,s_cc_out:$s, tGPR:$Rdn, tGPR:$Rm, pred:$p)>; + /// Similar to the above except these set the 's' bit so the /// instruction modifies the CPSR register. /// |
