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-rw-r--r--llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp3
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
index b0108f23064..bc485daf6e9 100644
--- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
@@ -1058,12 +1058,11 @@ ARMBaseRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
return;
const TargetInstrDesc &Desc = MI.getDesc();
- unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);
// If we get here, the immediate doesn't fit into the instruction. We folded
// as much as possible above, handle the rest, providing a register that is
// SP+LargeImm.
- assert((Offset || AddrMode == ARMII::AddrMode4) &&
+ assert((Offset || (Desc.TSFlags & ARMII::AddrModeMask) == ARMII::AddrMode4) &&
"This code isn't needed if offset already handled!");
// Insert a set of r12 with the full address: r12 = sp + offset
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