diff options
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp | 6 | ||||
-rw-r--r-- | llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp | 6 |
2 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp index 3163f6e5228..dea651631bd 100644 --- a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp +++ b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp @@ -119,7 +119,7 @@ static bool unsupportedBinOp(const MachineInstr &I, } /// Select the AArch64 opcode for the basic binary operation \p GenericOpc -/// (such as G_OR or G_ADD), appropriate for the register bank \p RegBankID +/// (such as G_OR or G_SDIV), appropriate for the register bank \p RegBankID /// and of size \p OpSize. /// \returns \p GenericOpc if the combination is unsupported. static unsigned selectBinaryOp(unsigned GenericOpc, unsigned RegBankID, @@ -140,9 +140,6 @@ static unsigned selectBinaryOp(unsigned GenericOpc, unsigned RegBankID, return AArch64::EORWrr; case TargetOpcode::G_AND: return AArch64::ANDWrr; - case TargetOpcode::G_ADD: - assert(OpSize != 32 && "s32 G_ADD should have been selected"); - return AArch64::ADDWrr; case TargetOpcode::G_SUB: return AArch64::SUBWrr; case TargetOpcode::G_SHL: @@ -759,7 +756,6 @@ bool AArch64InstructionSelector::select(MachineInstr &I) const { case TargetOpcode::G_ASHR: case TargetOpcode::G_SDIV: case TargetOpcode::G_UDIV: - case TargetOpcode::G_ADD: case TargetOpcode::G_SUB: case TargetOpcode::G_GEP: { // Reject the various things we don't support yet. diff --git a/llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp index dad390b752c..985260700e3 100644 --- a/llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp @@ -39,8 +39,11 @@ AArch64LegalizerInfo::AArch64LegalizerInfo() { for (auto BinOp : {G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR, G_SHL}) { // These operations naturally get the right answer when used on // GPR32, even if the actual type is narrower. - for (auto Ty : {s1, s8, s16, s32, s64, v2s32, v4s32, v2s64}) + for (auto Ty : {s32, s64, v2s32, v4s32, v2s64}) setAction({BinOp, Ty}, Legal); + + for (auto Ty : {s1, s8, s16}) + setAction({BinOp, Ty}, WidenScalar); } setAction({G_GEP, p0}, Legal); @@ -148,6 +151,7 @@ AArch64LegalizerInfo::AArch64LegalizerInfo() { setAction({G_UITOFP, 1, Ty}, Legal); } for (auto Ty : { s1, s8, s16 }) { + // FIXME: These should be widened on types smaller than s32. setAction({G_FPTOSI, 0, Ty}, Legal); setAction({G_FPTOUI, 0, Ty}, Legal); setAction({G_SITOFP, 1, Ty}, WidenScalar); |