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-rw-r--r--llvm/lib/CodeGen/LLVMTargetMachine.cpp19
-rw-r--r--llvm/lib/CodeGen/LiveVariables.cpp1
-rw-r--r--llvm/lib/CodeGen/MachineFunction.cpp73
-rw-r--r--llvm/lib/CodeGen/MachineFunctionAnalysis.cpp45
-rw-r--r--llvm/lib/CodeGen/MachineFunctionPass.cpp50
-rw-r--r--llvm/lib/CodeGen/MachineLoopInfo.cpp1
-rw-r--r--llvm/lib/CodeGen/MachineVerifier.cpp1
-rw-r--r--llvm/lib/CodeGen/PrologEpilogInserter.cpp1
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp11
-rw-r--r--llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp4
-rw-r--r--llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp17
11 files changed, 119 insertions, 104 deletions
diff --git a/llvm/lib/CodeGen/LLVMTargetMachine.cpp b/llvm/lib/CodeGen/LLVMTargetMachine.cpp
index 0f33ee3df8b..6f0581a7fc8 100644
--- a/llvm/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/llvm/lib/CodeGen/LLVMTargetMachine.cpp
@@ -18,6 +18,7 @@
#include "llvm/Analysis/LoopPass.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/GCStrategy.h"
+#include "llvm/CodeGen/MachineFunctionAnalysis.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetRegistry.h"
@@ -118,9 +119,6 @@ bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM,
PM.add(createGCInfoDeleter());
- // Delete machine code for this function
- PM.add(createMachineCodeDeleter());
-
return false; // success!
}
@@ -137,9 +135,6 @@ bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM,
PM.add(createGCInfoDeleter());
- // Delete machine code for this function
- PM.add(createMachineCodeDeleter());
-
return false; // success!
}
@@ -156,9 +151,6 @@ bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM,
PM.add(createGCInfoDeleter());
- // Delete machine code for this function
- PM.add(createMachineCodeDeleter());
-
return false; // success!
}
@@ -184,9 +176,6 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
PM.add(createGCInfoDeleter());
- // Delete machine code for this function
- PM.add(createMachineCodeDeleter());
-
return false; // success!
}
@@ -212,9 +201,6 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
PM.add(createGCInfoDeleter());
- // Delete machine code for this function
- PM.add(createMachineCodeDeleter());
-
return false; // success!
}
@@ -265,6 +251,9 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM,
// Standard Lower-Level Passes.
+ // Set up a MachineFunction for the rest of CodeGen to work on.
+ PM.add(new MachineFunctionAnalysis(*this, OptLevel));
+
// Enable FastISel with -fast, but allow that to be overridden.
if (EnableFastISelOption == cl::BOU_TRUE ||
(OptLevel == CodeGenOpt::None && EnableFastISelOption != cl::BOU_FALSE))
diff --git a/llvm/lib/CodeGen/LiveVariables.cpp b/llvm/lib/CodeGen/LiveVariables.cpp
index bb72d80cb6e..20345669eac 100644
--- a/llvm/lib/CodeGen/LiveVariables.cpp
+++ b/llvm/lib/CodeGen/LiveVariables.cpp
@@ -48,6 +48,7 @@ static RegisterPass<LiveVariables> X("livevars", "Live Variable Analysis");
void LiveVariables::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequiredID(UnreachableMachineBlockElimID);
AU.setPreservesAll();
+ MachineFunctionPass::getAnalysisUsage(AU);
}
void LiveVariables::VarInfo::dump() const {
diff --git a/llvm/lib/CodeGen/MachineFunction.cpp b/llvm/lib/CodeGen/MachineFunction.cpp
index 98396ee6d0c..aa3cfe2d5d0 100644
--- a/llvm/lib/CodeGen/MachineFunction.cpp
+++ b/llvm/lib/CodeGen/MachineFunction.cpp
@@ -36,15 +36,6 @@
#include <sstream>
using namespace llvm;
-bool MachineFunctionPass::runOnFunction(Function &F) {
- // Do not codegen any 'available_externally' functions at all, they have
- // definitions outside the translation unit.
- if (F.hasAvailableExternallyLinkage())
- return false;
-
- return runOnMachineFunction(MachineFunction::get(&F));
-}
-
namespace {
struct VISIBILITY_HIDDEN Printer : public MachineFunctionPass {
static char ID;
@@ -59,6 +50,7 @@ namespace {
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
+ MachineFunctionPass::getAnalysisUsage(AU);
}
bool runOnMachineFunction(MachineFunction &MF) {
@@ -78,31 +70,6 @@ FunctionPass *llvm::createMachineFunctionPrinterPass(std::ostream *OS,
return new Printer(OS, Banner);
}
-namespace {
- struct VISIBILITY_HIDDEN Deleter : public MachineFunctionPass {
- static char ID;
- Deleter() : MachineFunctionPass(&ID) {}
-
- const char *getPassName() const { return "Machine Code Deleter"; }
-
- bool runOnMachineFunction(MachineFunction &MF) {
- // Delete the annotation from the function now.
- MachineFunction::destruct(MF.getFunction());
- return true;
- }
- };
- char Deleter::ID = 0;
-}
-
-/// MachineCodeDeletion Pass - This pass deletes all of the machine code for
-/// the current function, which should happen after the function has been
-/// emitted to a .s file or to memory.
-FunctionPass *llvm::createMachineCodeDeleter() {
- return new Deleter();
-}
-
-
-
//===---------------------------------------------------------------------===//
// MachineFunction implementation
//===---------------------------------------------------------------------===//
@@ -111,7 +78,7 @@ void ilist_traits<MachineBasicBlock>::deleteNode(MachineBasicBlock *MBB) {
MBB->getParent()->DeleteMachineBasicBlock(MBB);
}
-MachineFunction::MachineFunction(const Function *F,
+MachineFunction::MachineFunction(Function *F,
const TargetMachine &TM)
: Annotation(AnnotationManager::getID("CodeGen::MachineCodeForFunction")),
Fn(F), Target(TM) {
@@ -356,42 +323,6 @@ void MachineFunction::viewCFGOnly() const
#endif // NDEBUG
}
-// The next two methods are used to construct and to retrieve
-// the MachineCodeForFunction object for the given function.
-// construct() -- Allocates and initializes for a given function and target
-// get() -- Returns a handle to the object.
-// This should not be called before "construct()"
-// for a given Function.
-//
-MachineFunction&
-MachineFunction::construct(const Function *Fn, const TargetMachine &Tar)
-{
- AnnotationID MF_AID =
- AnnotationManager::getID("CodeGen::MachineCodeForFunction");
- assert(Fn->getAnnotation(MF_AID) == 0 &&
- "Object already exists for this function!");
- MachineFunction* mcInfo = new MachineFunction(Fn, Tar);
- Fn->addAnnotation(mcInfo);
- return *mcInfo;
-}
-
-void MachineFunction::destruct(const Function *Fn) {
- AnnotationID MF_AID =
- AnnotationManager::getID("CodeGen::MachineCodeForFunction");
- bool Deleted = Fn->deleteAnnotation(MF_AID);
- assert(Deleted && "Machine code did not exist for function!");
- Deleted = Deleted; // silence warning when no assertions.
-}
-
-MachineFunction& MachineFunction::get(const Function *F)
-{
- AnnotationID MF_AID =
- AnnotationManager::getID("CodeGen::MachineCodeForFunction");
- MachineFunction *mc = (MachineFunction*)F->getAnnotation(MF_AID);
- assert(mc && "Call construct() method first to allocate the object");
- return *mc;
-}
-
/// addLiveIn - Add the specified physical register as a live-in value and
/// create a corresponding virtual register for it.
unsigned MachineFunction::addLiveIn(unsigned PReg,
diff --git a/llvm/lib/CodeGen/MachineFunctionAnalysis.cpp b/llvm/lib/CodeGen/MachineFunctionAnalysis.cpp
new file mode 100644
index 00000000000..8b7dba8121d
--- /dev/null
+++ b/llvm/lib/CodeGen/MachineFunctionAnalysis.cpp
@@ -0,0 +1,45 @@
+//===-- MachineFunctionAnalysis.cpp ---------------------------------------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains the definitions of the MachineFunctionAnalysis members.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/CodeGen/MachineFunctionAnalysis.h"
+#include "llvm/CodeGen/MachineFunction.h"
+using namespace llvm;
+
+// Register this pass with PassInfo directly to avoid having to define
+// a default constructor.
+static PassInfo
+X("Machine Function Analysis", "machine-function-analysis",
+ intptr_t(&MachineFunctionAnalysis::ID), 0,
+ /*CFGOnly=*/false, /*is_analysis=*/true);
+
+char MachineFunctionAnalysis::ID = 0;
+
+MachineFunctionAnalysis::MachineFunctionAnalysis(TargetMachine &tm,
+ CodeGenOpt::Level OL) :
+ FunctionPass(&ID), TM(tm), OptLevel(OL), MF(0) {
+}
+
+bool MachineFunctionAnalysis::runOnFunction(Function &F) {
+ assert(!MF && "MachineFunctionAnalysis already initialized!");
+ MF = new MachineFunction(&F, TM);
+ return false;
+}
+
+void MachineFunctionAnalysis::releaseMemory() {
+ delete MF;
+ MF = 0;
+}
+
+void MachineFunctionAnalysis::getAnalysisUsage(AnalysisUsage &AU) const {
+ AU.setPreservesAll();
+}
diff --git a/llvm/lib/CodeGen/MachineFunctionPass.cpp b/llvm/lib/CodeGen/MachineFunctionPass.cpp
new file mode 100644
index 00000000000..d8a7c552802
--- /dev/null
+++ b/llvm/lib/CodeGen/MachineFunctionPass.cpp
@@ -0,0 +1,50 @@
+//===-- MachineFunctionPass.cpp -------------------------------------------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains the definitions of the MachineFunctionPass members.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/Analysis/AliasAnalysis.h"
+#include "llvm/Analysis/ScalarEvolution.h"
+#include "llvm/Analysis/IVUsers.h"
+#include "llvm/Analysis/LiveValues.h"
+#include "llvm/Analysis/LoopDependenceAnalysis.h"
+#include "llvm/Analysis/MemoryDependenceAnalysis.h"
+#include "llvm/CodeGen/MachineFunctionAnalysis.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
+using namespace llvm;
+
+bool MachineFunctionPass::runOnFunction(Function &F) {
+ // Do not codegen any 'available_externally' functions at all, they have
+ // definitions outside the translation unit.
+ if (F.hasAvailableExternallyLinkage())
+ return false;
+
+ MachineFunction &MF = getAnalysis<MachineFunctionAnalysis>().getMF();
+ return runOnMachineFunction(MF);
+}
+
+void MachineFunctionPass::getAnalysisUsage(AnalysisUsage &AU) const {
+ AU.addRequired<MachineFunctionAnalysis>();
+
+ // MachineFunctionPass preserves all LLVM IR passes, but there's no
+ // high-level way to express this. Instead, just list a bunch of
+ // passes explicitly.
+ AU.addPreserved<AliasAnalysis>();
+ AU.addPreserved<ScalarEvolution>();
+ AU.addPreserved<IVUsers>();
+ AU.addPreserved<LoopDependenceAnalysis>();
+ AU.addPreserved<MemoryDependenceAnalysis>();
+ AU.addPreserved<LiveValues>();
+ AU.addPreserved<MachineFunctionAnalysis>();
+ AU.setPreservesCFG();
+
+ FunctionPass::getAnalysisUsage(AU);
+}
diff --git a/llvm/lib/CodeGen/MachineLoopInfo.cpp b/llvm/lib/CodeGen/MachineLoopInfo.cpp
index a5694ae82b0..2da8e3760e9 100644
--- a/llvm/lib/CodeGen/MachineLoopInfo.cpp
+++ b/llvm/lib/CodeGen/MachineLoopInfo.cpp
@@ -41,4 +41,5 @@ bool MachineLoopInfo::runOnMachineFunction(MachineFunction &) {
void MachineLoopInfo::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
AU.addRequired<MachineDominatorTree>();
+ MachineFunctionPass::getAnalysisUsage(AU);
}
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index d9c37de2622..a13d39e8680 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -55,6 +55,7 @@ namespace {
void getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
+ MachineFunctionPass::getAnalysisUsage(AU);
}
bool runOnMachineFunction(MachineFunction &MF);
diff --git a/llvm/lib/CodeGen/PrologEpilogInserter.cpp b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
index 5aa37c9044d..9d5c55b7a83 100644
--- a/llvm/lib/CodeGen/PrologEpilogInserter.cpp
+++ b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
@@ -111,7 +111,6 @@ bool PEI::runOnMachineFunction(MachineFunction &Fn) {
#if 0
void PEI::getAnalysisUsage(AnalysisUsage &AU) const {
- AU.setPreservesCFG();
if (ShrinkWrapping || ShrinkWrapFunc != "") {
AU.addRequired<MachineLoopInfo>();
AU.addRequired<MachineDominatorTree>();
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index ab87449945b..1072c95acd5 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -29,6 +29,7 @@
#include "llvm/CodeGen/GCStrategy.h"
#include "llvm/CodeGen/GCMetadata.h"
#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineFunctionAnalysis.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
@@ -267,7 +268,7 @@ static void EmitLiveInCopies(MachineBasicBlock *EntryMBB,
//===----------------------------------------------------------------------===//
SelectionDAGISel::SelectionDAGISel(TargetMachine &tm, CodeGenOpt::Level OL) :
- FunctionPass(&ID), TM(tm), TLI(*tm.getTargetLowering()),
+ MachineFunctionPass(&ID), TM(tm), TLI(*tm.getTargetLowering()),
FuncInfo(new FunctionLoweringInfo(TLI)),
CurDAG(new SelectionDAG(TLI, *FuncInfo)),
SDL(new SelectionDAGLowering(*CurDAG, TLI, *FuncInfo, OL)),
@@ -291,9 +292,12 @@ void SelectionDAGISel::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<GCModuleInfo>();
AU.addRequired<DwarfWriter>();
AU.setPreservesAll();
+ MachineFunctionPass::getAnalysisUsage(AU);
}
-bool SelectionDAGISel::runOnFunction(Function &Fn) {
+bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
+ Function &Fn = *mf.getFunction();
+
// Do some sanity-checking on the command-line options.
assert((!EnableFastISelVerbose || EnableFastISel) &&
"-fast-isel-verbose requires -fast-isel");
@@ -305,12 +309,11 @@ bool SelectionDAGISel::runOnFunction(Function &Fn) {
if (Fn.hasAvailableExternallyLinkage())
return false;
-
// Get alias analysis for load/store combining.
AA = &getAnalysis<AliasAnalysis>();
TargetMachine &TM = TLI.getTargetMachine();
- MF = &MachineFunction::construct(&Fn, TM);
+ MF = &mf;
const TargetInstrInfo &TII = *TM.getInstrInfo();
const TargetRegisterInfo &TRI = *TM.getRegisterInfo();
diff --git a/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp b/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
index d29ddaac4b3..cca52883ffc 100644
--- a/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
+++ b/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
@@ -253,10 +253,10 @@ namespace {
SPUtli(*tm.getTargetLowering())
{ }
- virtual bool runOnFunction(Function &Fn) {
+ virtual bool runOnMachineFunction(MachineFunction &MF) {
// Make sure we re-emit a set of the global base reg if necessary
GlobalBaseReg = 0;
- SelectionDAGISel::runOnFunction(Fn);
+ SelectionDAGISel::runOnMachineFunction(MF);
return true;
}
diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 922135571f0..d77ce571895 100644
--- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -20,6 +20,7 @@
#include "PPCHazardRecognizers.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineFunctionAnalysis.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
@@ -51,17 +52,12 @@ namespace {
PPCLowering(*TM.getTargetLowering()),
PPCSubTarget(*TM.getSubtargetImpl()) {}
- virtual bool runOnFunction(Function &Fn) {
- // Do not codegen any 'available_externally' functions at all, they have
- // definitions outside the translation unit.
- if (Fn.hasAvailableExternallyLinkage())
- return false;
-
+ virtual bool runOnMachineFunction(MachineFunction &MF) {
// Make sure we re-emit a set of the global base reg if necessary
GlobalBaseReg = 0;
- SelectionDAGISel::runOnFunction(Fn);
+ SelectionDAGISel::runOnMachineFunction(MF);
- InsertVRSaveCode(Fn);
+ InsertVRSaveCode(MF);
return true;
}
@@ -181,7 +177,7 @@ namespace {
/// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
virtual void InstructionSelect();
- void InsertVRSaveCode(Function &Fn);
+ void InsertVRSaveCode(MachineFunction &MF);
virtual const char *getPassName() const {
return "PowerPC DAG->DAG Pattern Instruction Selection";
@@ -218,13 +214,12 @@ void PPCDAGToDAGISel::InstructionSelect() {
/// InsertVRSaveCode - Once the entire function has been instruction selected,
/// all virtual registers are created and all machine instructions are built,
/// check to see if we need to save/restore VRSAVE. If so, do it.
-void PPCDAGToDAGISel::InsertVRSaveCode(Function &F) {
+void PPCDAGToDAGISel::InsertVRSaveCode(MachineFunction &Fn) {
// Check to see if this function uses vector registers, which means we have to
// save and restore the VRSAVE register and update it with the regs we use.
//
// In this case, there will be virtual registers of vector type type created
// by the scheduler. Detect them now.
- MachineFunction &Fn = MachineFunction::get(&F);
bool HasVectorVReg = false;
for (unsigned i = TargetRegisterInfo::FirstVirtualRegister,
e = RegInfo->getLastVirtReg()+1; i != e; ++i)
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