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-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index 3d255a8c9fa..5f2436b0b04 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -224,7 +224,7 @@ bool AMDGPUInstructionSelector::selectG_CONSTANT(MachineInstr &I) const {
} else {
const TargetRegisterClass *RC = TRI.getRegClassForReg(MRI, DstReg);
IsSgpr = TRI.isSGPRClass(RC);
- Size = RC->MC->getPhysRegSize() * 8;
+ Size = TRI.getRegSizeInBits(*RC);
}
if (Size != 32 && Size != 64)
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