diff options
Diffstat (limited to 'llvm/lib')
7 files changed, 16 insertions, 9 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 87220a50b92..7a47da4ec52 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -2658,7 +2658,9 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node,                                       false, false, 0);      SDValue VAList = VAListLoad; -    if (Align != 0 ) { +    if (Align > TLI.getMinStackArgumentAlignment()) { +      assert(((Align & (Align-1)) == 0) && "Expected Align to be a power of 2"); +        VAList = DAG.getNode(ISD::ADD, dl, TLI.getPointerTy(), VAList,                             DAG.getConstant(Align - 1,                                             TLI.getPointerTy())); diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp index 79e3dec28eb..68bcebc7dd3 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp @@ -504,7 +504,8 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_VAARG(SDNode *N) {    DebugLoc dl = N->getDebugLoc();    SDValue NewVAARG; -  NewVAARG = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2)); +  NewVAARG = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2), +			  N->getConstantOperandVal(3));    // Legalized the chain result - switch anything that used the old chain to    // use the new one. diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp index e4b42064fc2..b94ea9a3a9a 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp @@ -572,7 +572,8 @@ SDValue DAGTypeLegalizer::PromoteIntRes_VAARG(SDNode *N) {    SmallVector<SDValue, 8> Parts(NumRegs);    for (unsigned i = 0; i < NumRegs; ++i) { -    Parts[i] = DAG.getVAArg(RegVT, dl, Chain, Ptr, N->getOperand(2)); +    Parts[i] = DAG.getVAArg(RegVT, dl, Chain, Ptr, N->getOperand(2), +                            N->getConstantOperandVal(3));      Chain = Parts[i].getValue(1);    } diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp index 71adb336170..9c2b1d9ed73 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp @@ -243,13 +243,10 @@ void DAGTypeLegalizer::ExpandRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi) {    SDValue Chain = N->getOperand(0);    SDValue Ptr = N->getOperand(1);    DebugLoc dl = N->getDebugLoc(); -  const unsigned OldAlign = N->getConstantOperandVal(3); -  const Type *Type = OVT.getTypeForEVT(*DAG.getContext()); -  const unsigned TypeAlign = TLI.getTargetData()->getABITypeAlignment(Type); -  const unsigned Align = std::max(OldAlign, TypeAlign); +  const unsigned Align = N->getConstantOperandVal(3);    Lo = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2), Align); -  Hi = DAG.getVAArg(NVT, dl, Lo.getValue(1), Ptr, N->getOperand(2)); +  Hi = DAG.getVAArg(NVT, dl, Lo.getValue(1), Ptr, N->getOperand(2), 0);    // Handle endianness of the load.    if (TLI.isBigEndian()) diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 3b3ee3e3434..ea41ec63a52 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -5672,7 +5672,8 @@ void SelectionDAGBuilder::visitVAStart(const CallInst &I) {  void SelectionDAGBuilder::visitVAArg(const VAArgInst &I) {    SDValue V = DAG.getVAArg(TLI.getValueType(I.getType()), getCurDebugLoc(),                             getRoot(), getValue(I.getOperand(0)), -                           DAG.getSrcValue(I.getOperand(0))); +                           DAG.getSrcValue(I.getOperand(0)), +                           TLI.getTargetData()->getABITypeAlignment(I.getType()));    setValue(&I, V);    DAG.setRoot(V.getValue(1));  } diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp index a9a7e5054b7..4f3866956ca 100644 --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -580,6 +580,7 @@ TargetLowering::TargetLowering(const TargetMachine &tm,    JumpBufSize = 0;    JumpBufAlignment = 0;    PrefLoopAlignment = 0; +  MinStackArgumentAlignment = 1;    ShouldFoldAtomicFences = false;    InitLibcallNames(LibcallRoutineNames); diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index e1e5a80678b..e60a2b14f1f 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -539,6 +539,10 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)    maxStoresPerMemcpy = 1;   //// temporary - rewrite interface to use type +  // On ARM arguments smaller than 4 bytes are extended, so all arguments +  // are at least 4 bytes aligned. +  setMinStackArgumentAlignment(4); +    if (EnableARMCodePlacement)      benefitFromCodePlacementOpt = true;  }  | 

