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-rw-r--r--llvm/lib/Target/Mips/MicroMipsInstrFormats.td2
-rw-r--r--llvm/lib/Target/Mips/MicroMipsInstrInfo.td28
-rw-r--r--llvm/lib/Target/Mips/MipsEVAInstrInfo.td29
-rw-r--r--llvm/lib/Target/Mips/MipsInstrInfo.td2
4 files changed, 38 insertions, 23 deletions
diff --git a/llvm/lib/Target/Mips/MicroMipsInstrFormats.td b/llvm/lib/Target/Mips/MicroMipsInstrFormats.td
index bc0045dad21..aff8cca3020 100644
--- a/llvm/lib/Target/Mips/MicroMipsInstrFormats.td
+++ b/llvm/lib/Target/Mips/MicroMipsInstrFormats.td
@@ -699,7 +699,7 @@ class LL_FM_MM<bits<4> funct> : MMArch {
let Inst{11-0} = addr{11-0};
}
-class LLE_FM_MM<bits<4> funct> {
+class LLE_FM_MM<bits<4> funct> : MMArch {
bits<5> rt;
bits<21> addr;
bits<5> base = addr{20-16};
diff --git a/llvm/lib/Target/Mips/MicroMipsInstrInfo.td b/llvm/lib/Target/Mips/MicroMipsInstrInfo.td
index 64fe55e9776..a0b7e9429aa 100644
--- a/llvm/lib/Target/Mips/MicroMipsInstrInfo.td
+++ b/llvm/lib/Target/Mips/MicroMipsInstrInfo.td
@@ -273,6 +273,7 @@ class LLEBaseMM<string opstr, RegisterOperand RO> :
InstSE<(outs RO:$rt), (ins mem_simm9:$addr),
!strconcat(opstr, "\t$rt, $addr"), [], II_LLE, FrmI> {
let DecoderMethod = "DecodeMemMMImm9";
+ string BaseOpcode = opstr;
let mayLoad = 1;
}
@@ -288,6 +289,7 @@ class SCEBaseMM<string opstr, RegisterOperand RO> :
InstSE<(outs RO:$dst), (ins RO:$rt, mem_simm9:$addr),
!strconcat(opstr, "\t$rt, $addr"), [], II_SCE, FrmI> {
let DecoderMethod = "DecodeMemMMImm9";
+ string BaseOpcode = opstr;
let mayStore = 1;
let Constraints = "$rt = $dst";
}
@@ -777,21 +779,27 @@ let DecoderNamespace = "MicroMips", Predicates = [InMicroMips] in {
}
let DecoderMethod = "DecodeMemMMImm9" in {
- def LBE_MM : Load<"lbe", GPR32Opnd, null_frag, II_LBE>,
+ def LBE_MM : MMRel, Load<"lbe", GPR32Opnd, null_frag, II_LBE>,
POOL32C_LHUE_FM_MM<0x18, 0x6, 0x4>;
- def LBuE_MM : Load<"lbue", GPR32Opnd, null_frag, II_LBUE>,
+ def LBuE_MM : MMRel, Load<"lbue", GPR32Opnd, null_frag, II_LBUE>,
POOL32C_LHUE_FM_MM<0x18, 0x6, 0x0>;
- def LHE_MM : LoadMemory<"lhe", GPR32Opnd, mem_simm9, null_frag, II_LHE>,
+ def LHE_MM : MMRel, LoadMemory<"lhe", GPR32Opnd, mem_simm9,
+ null_frag, II_LHE>,
POOL32C_LHUE_FM_MM<0x18, 0x6, 0x5>;
- def LHuE_MM : LoadMemory<"lhue", GPR32Opnd, mem_simm9, null_frag, II_LHUE>,
+ def LHuE_MM : MMRel, LoadMemory<"lhue", GPR32Opnd, mem_simm9,
+ null_frag, II_LHUE>,
POOL32C_LHUE_FM_MM<0x18, 0x6, 0x1>;
- def LWE_MM : LoadMemory<"lwe", GPR32Opnd, mem_simm9, null_frag, II_LWE>,
+ def LWE_MM : MMRel, LoadMemory<"lwe", GPR32Opnd, mem_simm9,
+ null_frag, II_LWE>,
POOL32C_LHUE_FM_MM<0x18, 0x6, 0x7>;
- def SBE_MM : StoreMemory<"sbe", GPR32Opnd, mem_simm9, null_frag, II_SBE>,
+ def SBE_MM : MMRel, StoreMemory<"sbe", GPR32Opnd, mem_simm9,
+ null_frag, II_SBE>,
POOL32C_LHUE_FM_MM<0x18, 0xa, 0x4>;
- def SHE_MM : StoreMemory<"she", GPR32Opnd, mem_simm9, null_frag, II_SHE>,
+ def SHE_MM : MMRel, StoreMemory<"she", GPR32Opnd, mem_simm9,
+ null_frag, II_SHE>,
POOL32C_LHUE_FM_MM<0x18, 0xa, 0x5>;
- def SWE_MM : StoreMemory<"swe", GPR32Opnd, mem_simm9, null_frag, II_SWE>,
+ def SWE_MM : MMRel, StoreMemory<"swe", GPR32Opnd, mem_simm9,
+ null_frag, II_SWE>,
POOL32C_LHUE_FM_MM<0x18, 0xa, 0x7>;
}
@@ -971,8 +979,8 @@ let DecoderNamespace = "MicroMips", Predicates = [InMicroMips] in {
def LL_MM : LLBaseMM<"ll", GPR32Opnd>, LL_FM_MM<0x3>;
def SC_MM : SCBaseMM<"sc", GPR32Opnd>, LL_FM_MM<0xb>;
- def LLE_MM : LLEBaseMM<"lle", GPR32Opnd>, LLE_FM_MM<0x6>;
- def SCE_MM : SCEBaseMM<"sce", GPR32Opnd>, LLE_FM_MM<0xA>;
+ def LLE_MM : MMRel, LLEBaseMM<"lle", GPR32Opnd>, LLE_FM_MM<0x6>;
+ def SCE_MM : MMRel, SCEBaseMM<"sce", GPR32Opnd>, LLE_FM_MM<0xA>;
let DecoderMethod = "DecodeCacheOpMM" in {
def CACHE_MM : MMRel, CacheOp<"cache", mem_mm_12, II_CACHE>,
diff --git a/llvm/lib/Target/Mips/MipsEVAInstrInfo.td b/llvm/lib/Target/Mips/MipsEVAInstrInfo.td
index 26df263d228..41b7014b156 100644
--- a/llvm/lib/Target/Mips/MipsEVAInstrInfo.td
+++ b/llvm/lib/Target/Mips/MipsEVAInstrInfo.td
@@ -59,6 +59,7 @@ class LOAD_EVA_DESC_BASE<string instr_asm, RegisterOperand GPROpnd,
list<dag> Pattern = [];
string DecoderMethod = "DecodeMemEVA";
bit canFoldAsLoad = 1;
+ string BaseOpcode = instr_asm;
bit mayLoad = 1;
InstrItinClass Itinerary = itin;
}
@@ -77,6 +78,7 @@ class STORE_EVA_DESC_BASE<string instr_asm, RegisterOperand GPROpnd,
string AsmString = !strconcat(instr_asm, "\t$rt, $addr");
list<dag> Pattern = [];
string DecoderMethod = "DecodeMemEVA";
+ string BaseOpcode = instr_asm;
bit mayStore = 1;
InstrItinClass Itinerary = itin;
}
@@ -121,6 +123,7 @@ class LLE_DESC_BASE<string instr_asm, RegisterOperand GPROpnd,
dag InOperandList = (ins mem_simm9:$addr);
string AsmString = !strconcat(instr_asm, "\t$rt, $addr");
list<dag> Pattern = [];
+ string BaseOpcode = instr_asm;
bit mayLoad = 1;
string DecoderMethod = "DecodeMemEVA";
InstrItinClass Itinerary = itin;
@@ -134,6 +137,7 @@ class SCE_DESC_BASE<string instr_asm, RegisterOperand GPROpnd,
dag InOperandList = (ins GPROpnd:$rt, mem_simm9:$addr);
string AsmString = !strconcat(instr_asm, "\t$rt, $addr");
list<dag> Pattern = [];
+ string BaseOpcode = instr_asm;
bit mayStore = 1;
string Constraints = "$rt = $dst";
string DecoderMethod = "DecodeMemEVA";
@@ -159,6 +163,7 @@ class CACHEE_DESC_BASE<string instr_asm, Operand MemOpnd,
dag InOperandList = (ins MemOpnd:$addr, uimm5:$hint);
string AsmString = !strconcat(instr_asm, "\t$hint, $addr");
list<dag> Pattern = [];
+ string BaseOpcode = instr_asm;
string DecoderMethod = "DecodeCacheeOp_CacheOpR6";
InstrItinClass Itinerary = itin;
}
@@ -173,17 +178,17 @@ class PREFE_DESC : CACHEE_DESC_BASE<"prefe", mem_simm9, II_PREFE>;
//===----------------------------------------------------------------------===//
/// Load and Store EVA Instructions
-def LBE : LBE_ENC, LBE_DESC, INSN_EVA;
-def LBuE : LBuE_ENC, LBuE_DESC, INSN_EVA;
-def LHE : LHE_ENC, LHE_DESC, INSN_EVA;
-def LHuE : LHuE_ENC, LHuE_DESC, INSN_EVA;
+def LBE : MMRel, LBE_ENC, LBE_DESC, INSN_EVA;
+def LBuE : MMRel, LBuE_ENC, LBuE_DESC, INSN_EVA;
+def LHE : MMRel, LHE_ENC, LHE_DESC, INSN_EVA;
+def LHuE : MMRel, LHuE_ENC, LHuE_DESC, INSN_EVA;
let AdditionalPredicates = [NotInMicroMips] in {
-def LWE : LWE_ENC, LWE_DESC, INSN_EVA;
+def LWE : MMRel, LWE_ENC, LWE_DESC, INSN_EVA;
}
-def SBE : SBE_ENC, SBE_DESC, INSN_EVA;
-def SHE : SHE_ENC, SHE_DESC, INSN_EVA;
+def SBE : MMRel, SBE_ENC, SBE_DESC, INSN_EVA;
+def SHE : MMRel, SHE_ENC, SHE_DESC, INSN_EVA;
let AdditionalPredicates = [NotInMicroMips] in {
-def SWE : SWE_ENC, SWE_DESC, INSN_EVA;
+def SWE : MMRel, SWE_ENC, SWE_DESC, INSN_EVA;
}
/// load/store left/right EVA
@@ -196,8 +201,8 @@ def SWRE : SWRE_ENC, SWRE_DESC, INSN_EVA_NOT_32R6_64R6;
/// Load-linked EVA, Store-conditional EVA
let AdditionalPredicates = [NotInMicroMips] in {
-def LLE : LLE_ENC, LLE_DESC, INSN_EVA;
-def SCE : SCE_ENC, SCE_DESC, INSN_EVA;
+def LLE : MMRel, LLE_ENC, LLE_DESC, INSN_EVA;
+def SCE : MMRel, SCE_ENC, SCE_DESC, INSN_EVA;
}
let AdditionalPredicates = [NotInMicroMips] in {
@@ -205,5 +210,5 @@ let AdditionalPredicates = [NotInMicroMips] in {
def TLBINVF : TLBINVF_ENC, TLBINVF_DESC, INSN_EVA;
}
-def CACHEE : CACHEE_ENC, CACHEE_DESC, INSN_EVA;
-def PREFE : PREFE_ENC, PREFE_DESC, INSN_EVA;
+def CACHEE : MMRel, CACHEE_ENC, CACHEE_DESC, INSN_EVA;
+def PREFE : MMRel, PREFE_ENC, PREFE_DESC, INSN_EVA;
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td
index e0d818b749d..1e87332f11f 100644
--- a/llvm/lib/Target/Mips/MipsInstrInfo.td
+++ b/llvm/lib/Target/Mips/MipsInstrInfo.td
@@ -1333,6 +1333,7 @@ class LoadMemory<string opstr, DAGOperand RO, DAGOperand MO,
[(set RO:$rt, (OpNode Addr:$addr))], Itin, FrmI, opstr> {
let DecoderMethod = "DecodeMem";
let canFoldAsLoad = 1;
+ string BaseOpcode = opstr;
let mayLoad = 1;
}
@@ -1346,6 +1347,7 @@ class StoreMemory<string opstr, DAGOperand RO, DAGOperand MO,
InstSE<(outs), (ins RO:$rt, MO:$addr), !strconcat(opstr, "\t$rt, $addr"),
[(OpNode RO:$rt, Addr:$addr)], Itin, FrmI, opstr> {
let DecoderMethod = "DecodeMem";
+ string BaseOpcode = opstr;
let mayStore = 1;
}
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