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-rw-r--r--llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp47
-rw-r--r--llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp9
-rw-r--r--llvm/lib/CodeGen/RegAllocBase.cpp6
-rw-r--r--llvm/lib/CodeGen/RegAllocBase.h1
-rw-r--r--llvm/lib/CodeGen/RegAllocGreedy.cpp12
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp45
-rw-r--r--llvm/lib/IR/LegacyPassManager.cpp8
-rw-r--r--llvm/lib/IRReader/IRReader.cpp9
-rw-r--r--llvm/lib/Support/Timer.cpp41
-rw-r--r--llvm/lib/Target/Hexagon/HexagonGenInsert.cpp13
-rw-r--r--llvm/lib/Target/Hexagon/RDFGraph.cpp3
-rw-r--r--llvm/lib/Target/Hexagon/RDFGraph.h1
12 files changed, 120 insertions, 75 deletions
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index a4cd4d74c3d..16542f54cf1 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -55,10 +55,15 @@ using namespace llvm;
#define DEBUG_TYPE "asm-printer"
-static const char *const DWARFGroupName = "DWARF Emission";
-static const char *const DbgTimerName = "Debug Info Emission";
-static const char *const EHTimerName = "DWARF Exception Writer";
-static const char *const CodeViewLineTablesGroupName = "CodeView Line Tables";
+static const char *const DWARFGroupName = "dwarf";
+static const char *const DWARFGroupDescription = "DWARF Emission";
+static const char *const DbgTimerName = "emit";
+static const char *const DbgTimerDescription = "Debug Info Emission";
+static const char *const EHTimerName = "write_exception";
+static const char *const EHTimerDescription = "DWARF Exception Writer";
+static const char *const CodeViewLineTablesGroupName = "linetables";
+static const char *const CodeViewLineTablesGroupDescription =
+ "CodeView Line Tables";
STATISTIC(EmittedInsts, "Number of machine instrs printed");
@@ -244,13 +249,15 @@ bool AsmPrinter::doInitialization(Module &M) {
bool EmitCodeView = MMI->getModule()->getCodeViewFlag();
if (EmitCodeView && TM.getTargetTriple().isKnownWindowsMSVCEnvironment()) {
Handlers.push_back(HandlerInfo(new CodeViewDebug(this),
- DbgTimerName,
- CodeViewLineTablesGroupName));
+ DbgTimerName, DbgTimerDescription,
+ CodeViewLineTablesGroupName,
+ CodeViewLineTablesGroupDescription));
}
if (!EmitCodeView || MMI->getModule()->getDwarfVersion()) {
DD = new DwarfDebug(this, &M);
DD->beginModule();
- Handlers.push_back(HandlerInfo(DD, DbgTimerName, DWARFGroupName));
+ Handlers.push_back(HandlerInfo(DD, DbgTimerName, DbgTimerDescription,
+ DWARFGroupName, DWARFGroupDescription));
}
}
@@ -278,7 +285,8 @@ bool AsmPrinter::doInitialization(Module &M) {
break;
}
if (ES)
- Handlers.push_back(HandlerInfo(ES, EHTimerName, DWARFGroupName));
+ Handlers.push_back(HandlerInfo(ES, EHTimerName, EHTimerDescription,
+ DWARFGroupName, DWARFGroupDescription));
return false;
}
@@ -399,7 +407,9 @@ void AsmPrinter::EmitGlobalVariable(const GlobalVariable *GV) {
unsigned AlignLog = getGVAlignmentLog2(GV, DL);
for (const HandlerInfo &HI : Handlers) {
- NamedRegionTimer T(HI.TimerName, HI.TimerGroupName, TimePassesIsEnabled);
+ NamedRegionTimer T(HI.TimerName, HI.TimerDescription,
+ HI.TimerGroupName, HI.TimerGroupDescription,
+ TimePassesIsEnabled);
HI.Handler->setSymbolSize(GVSym, Size);
}
@@ -588,7 +598,8 @@ void AsmPrinter::EmitFunctionHeader() {
// Emit pre-function debug and/or EH information.
for (const HandlerInfo &HI : Handlers) {
- NamedRegionTimer T(HI.TimerName, HI.TimerGroupName, TimePassesIsEnabled);
+ NamedRegionTimer T(HI.TimerName, HI.TimerDescription, HI.TimerGroupName,
+ HI.TimerGroupDescription, TimePassesIsEnabled);
HI.Handler->beginFunction(MF);
}
@@ -852,7 +863,8 @@ void AsmPrinter::EmitFunctionBody() {
if (ShouldPrintDebugScopes) {
for (const HandlerInfo &HI : Handlers) {
- NamedRegionTimer T(HI.TimerName, HI.TimerGroupName,
+ NamedRegionTimer T(HI.TimerName, HI.TimerDescription,
+ HI.TimerGroupName, HI.TimerGroupDescription,
TimePassesIsEnabled);
HI.Handler->beginInstruction(&MI);
}
@@ -896,7 +908,8 @@ void AsmPrinter::EmitFunctionBody() {
if (ShouldPrintDebugScopes) {
for (const HandlerInfo &HI : Handlers) {
- NamedRegionTimer T(HI.TimerName, HI.TimerGroupName,
+ NamedRegionTimer T(HI.TimerName, HI.TimerDescription,
+ HI.TimerGroupName, HI.TimerGroupDescription,
TimePassesIsEnabled);
HI.Handler->endInstruction();
}
@@ -954,7 +967,8 @@ void AsmPrinter::EmitFunctionBody() {
}
for (const HandlerInfo &HI : Handlers) {
- NamedRegionTimer T(HI.TimerName, HI.TimerGroupName, TimePassesIsEnabled);
+ NamedRegionTimer T(HI.TimerName, HI.TimerDescription, HI.TimerGroupName,
+ HI.TimerGroupDescription, TimePassesIsEnabled);
HI.Handler->markFunctionEnd();
}
@@ -963,7 +977,8 @@ void AsmPrinter::EmitFunctionBody() {
// Emit post-function debug and/or EH information.
for (const HandlerInfo &HI : Handlers) {
- NamedRegionTimer T(HI.TimerName, HI.TimerGroupName, TimePassesIsEnabled);
+ NamedRegionTimer T(HI.TimerName, HI.TimerDescription, HI.TimerGroupName,
+ HI.TimerGroupDescription, TimePassesIsEnabled);
HI.Handler->endFunction(MF);
}
MMI->EndFunction();
@@ -1154,8 +1169,8 @@ bool AsmPrinter::doFinalization(Module &M) {
// Finalize debug and EH information.
for (const HandlerInfo &HI : Handlers) {
- NamedRegionTimer T(HI.TimerName, HI.TimerGroupName,
- TimePassesIsEnabled);
+ NamedRegionTimer T(HI.TimerName, HI.TimerDescription, HI.TimerGroupName,
+ HI.TimerGroupDescription, TimePassesIsEnabled);
HI.Handler->endModule();
delete HI.Handler;
}
diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
index ef21f6bb9c1..59467f7dbaf 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
@@ -120,8 +120,10 @@ static cl::opt<LinkageNameOption>
"Abstract subprograms")),
cl::init(DefaultLinkageNames));
-static const char *const DWARFGroupName = "DWARF Emission";
-static const char *const DbgTimerName = "DWARF Debug Writer";
+static const char *const DWARFGroupName = "dwarf";
+static const char *const DWARFGroupDescription = "DWARF Emission";
+static const char *const DbgTimerName = "writer";
+static const char *const DbgTimerDescription = "DWARF Debug Writer";
void DebugLocDwarfExpression::EmitOp(uint8_t Op, const char *Comment) {
BS.EmitInt8(
@@ -464,7 +466,8 @@ void DwarfDebug::constructAndAddImportedEntityDIE(DwarfCompileUnit &TheCU,
// global DIEs and emit initial debug info sections. This is invoked by
// the target AsmPrinter.
void DwarfDebug::beginModule() {
- NamedRegionTimer T(DbgTimerName, DWARFGroupName, TimePassesIsEnabled);
+ NamedRegionTimer T(DbgTimerName, DbgTimerDescription, DWARFGroupName,
+ DWARFGroupDescription, TimePassesIsEnabled);
if (DisableDebugInfoPrinting)
return;
diff --git a/llvm/lib/CodeGen/RegAllocBase.cpp b/llvm/lib/CodeGen/RegAllocBase.cpp
index c204665dfd5..fb49a934431 100644
--- a/llvm/lib/CodeGen/RegAllocBase.cpp
+++ b/llvm/lib/CodeGen/RegAllocBase.cpp
@@ -41,7 +41,8 @@ static cl::opt<bool, true>
VerifyRegAlloc("verify-regalloc", cl::location(RegAllocBase::VerifyEnabled),
cl::desc("Verify during register allocation"));
-const char RegAllocBase::TimerGroupName[] = "Register Allocation";
+const char RegAllocBase::TimerGroupName[] = "regalloc";
+const char RegAllocBase::TimerGroupDescription[] = "Register Allocation";
bool RegAllocBase::VerifyEnabled = false;
//===----------------------------------------------------------------------===//
@@ -67,7 +68,8 @@ void RegAllocBase::init(VirtRegMap &vrm,
// register, unify them with the corresponding LiveIntervalUnion, otherwise push
// them on the priority queue for later assignment.
void RegAllocBase::seedLiveRegs() {
- NamedRegionTimer T("Seed Live Regs", TimerGroupName, TimePassesIsEnabled);
+ NamedRegionTimer T("seed", "Seed Live Regs", TimerGroupName,
+ TimerGroupDescription, TimePassesIsEnabled);
for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
if (MRI->reg_nodbg_empty(Reg))
diff --git a/llvm/lib/CodeGen/RegAllocBase.h b/llvm/lib/CodeGen/RegAllocBase.h
index 296ffe8692c..d8921b5ce6d 100644
--- a/llvm/lib/CodeGen/RegAllocBase.h
+++ b/llvm/lib/CodeGen/RegAllocBase.h
@@ -105,6 +105,7 @@ protected:
// Use this group name for NamedRegionTimer.
static const char TimerGroupName[];
+ static const char TimerGroupDescription[];
/// Method called when the allocator is about to remove a LiveInterval.
virtual void aboutToRemoveInterval(LiveInterval &LI) {}
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp b/llvm/lib/CodeGen/RegAllocGreedy.cpp
index 4a381e0aa83..c47cfb1b986 100644
--- a/llvm/lib/CodeGen/RegAllocGreedy.cpp
+++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp
@@ -869,7 +869,8 @@ unsigned RAGreedy::tryEvict(LiveInterval &VirtReg,
AllocationOrder &Order,
SmallVectorImpl<unsigned> &NewVRegs,
unsigned CostPerUseLimit) {
- NamedRegionTimer T("Evict", TimerGroupName, TimePassesIsEnabled);
+ NamedRegionTimer T("evict", "Evict", TimerGroupName, TimerGroupDescription,
+ TimePassesIsEnabled);
// Keep track of the cheapest interference seen so far.
EvictionCost BestCost;
@@ -1967,7 +1968,8 @@ unsigned RAGreedy::trySplit(LiveInterval &VirtReg, AllocationOrder &Order,
// Local intervals are handled separately.
if (LIS->intervalIsInOneMBB(VirtReg)) {
- NamedRegionTimer T("Local Splitting", TimerGroupName, TimePassesIsEnabled);
+ NamedRegionTimer T("local_split", "Local Splitting", TimerGroupName,
+ TimerGroupDescription, TimePassesIsEnabled);
SA->analyze(&VirtReg);
unsigned PhysReg = tryLocalSplit(VirtReg, Order, NewVRegs);
if (PhysReg || !NewVRegs.empty())
@@ -1975,7 +1977,8 @@ unsigned RAGreedy::trySplit(LiveInterval &VirtReg, AllocationOrder &Order,
return tryInstructionSplit(VirtReg, Order, NewVRegs);
}
- NamedRegionTimer T("Global Splitting", TimerGroupName, TimePassesIsEnabled);
+ NamedRegionTimer T("global_split", "Global Splitting", TimerGroupName,
+ TimerGroupDescription, TimePassesIsEnabled);
SA->analyze(&VirtReg);
@@ -2593,7 +2596,8 @@ unsigned RAGreedy::selectOrSplitImpl(LiveInterval &VirtReg,
DEBUG(dbgs() << "Do as if this register is in memory\n");
NewVRegs.push_back(VirtReg.reg);
} else {
- NamedRegionTimer T("Spiller", TimerGroupName, TimePassesIsEnabled);
+ NamedRegionTimer T("spill", "Spiller", TimerGroupName,
+ TimerGroupDescription, TimePassesIsEnabled);
LiveRangeEdit LRE(&VirtReg, NewVRegs, *MF, *LIS, VRM, this, &DeadRemats);
spiller().spill(LRE);
setStage(NewVRegs.begin(), NewVRegs.end(), RS_Done);
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 97a2d472a16..16e01395f2b 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -725,9 +725,8 @@ void SelectionDAGISel::ComputeLiveOutVRegInfo() {
}
void SelectionDAGISel::CodeGenAndEmitDAG() {
- std::string GroupName;
- if (TimePassesIsEnabled)
- GroupName = "Instruction Selection and Scheduling";
+ StringRef GroupName = "sdag";
+ StringRef GroupDescription = "Instruction Selection and Scheduling";
std::string BlockName;
int BlockNumber = -1;
(void)BlockNumber;
@@ -755,7 +754,8 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
// Run the DAG combiner in pre-legalize mode.
{
- NamedRegionTimer T("DAG Combining 1", GroupName, TimePassesIsEnabled);
+ NamedRegionTimer T("combine1", "DAG Combining 1", GroupName,
+ GroupDescription, TimePassesIsEnabled);
CurDAG->Combine(BeforeLegalizeTypes, *AA, OptLevel);
}
@@ -769,7 +769,8 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
bool Changed;
{
- NamedRegionTimer T("Type Legalization", GroupName, TimePassesIsEnabled);
+ NamedRegionTimer T("legalize_types", "Type Legalization", GroupName,
+ GroupDescription, TimePassesIsEnabled);
Changed = CurDAG->LegalizeTypes();
}
@@ -784,8 +785,8 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
// Run the DAG combiner in post-type-legalize mode.
{
- NamedRegionTimer T("DAG Combining after legalize types", GroupName,
- TimePassesIsEnabled);
+ NamedRegionTimer T("combine_lt", "DAG Combining after legalize types",
+ GroupName, GroupDescription, TimePassesIsEnabled);
CurDAG->Combine(AfterLegalizeTypes, *AA, OptLevel);
}
@@ -795,13 +796,15 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
}
{
- NamedRegionTimer T("Vector Legalization", GroupName, TimePassesIsEnabled);
+ NamedRegionTimer T("legalize_vec", "Vector Legalization", GroupName,
+ GroupDescription, TimePassesIsEnabled);
Changed = CurDAG->LegalizeVectors();
}
if (Changed) {
{
- NamedRegionTimer T("Type Legalization 2", GroupName, TimePassesIsEnabled);
+ NamedRegionTimer T("legalize_types2", "Type Legalization 2", GroupName,
+ GroupDescription, TimePassesIsEnabled);
CurDAG->LegalizeTypes();
}
@@ -810,8 +813,8 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
// Run the DAG combiner in post-type-legalize mode.
{
- NamedRegionTimer T("DAG Combining after legalize vectors", GroupName,
- TimePassesIsEnabled);
+ NamedRegionTimer T("combine_lv", "DAG Combining after legalize vectors",
+ GroupName, GroupDescription, TimePassesIsEnabled);
CurDAG->Combine(AfterLegalizeVectorOps, *AA, OptLevel);
}
@@ -823,7 +826,8 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
CurDAG->viewGraph("legalize input for " + BlockName);
{
- NamedRegionTimer T("DAG Legalization", GroupName, TimePassesIsEnabled);
+ NamedRegionTimer T("legalize", "DAG Legalization", GroupName,
+ GroupDescription, TimePassesIsEnabled);
CurDAG->Legalize();
}
@@ -835,7 +839,8 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
// Run the DAG combiner in post-legalize mode.
{
- NamedRegionTimer T("DAG Combining 2", GroupName, TimePassesIsEnabled);
+ NamedRegionTimer T("combine2", "DAG Combining 2", GroupName,
+ GroupDescription, TimePassesIsEnabled);
CurDAG->Combine(AfterLegalizeDAG, *AA, OptLevel);
}
@@ -851,7 +856,8 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
// Third, instruction select all of the operations to machine code, adding the
// code to the MachineBasicBlock.
{
- NamedRegionTimer T("Instruction Selection", GroupName, TimePassesIsEnabled);
+ NamedRegionTimer T("isel", "Instruction Selection", GroupName,
+ GroupDescription, TimePassesIsEnabled);
DoInstructionSelection();
}
@@ -864,8 +870,8 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
// Schedule machine code.
ScheduleDAGSDNodes *Scheduler = CreateScheduler();
{
- NamedRegionTimer T("Instruction Scheduling", GroupName,
- TimePassesIsEnabled);
+ NamedRegionTimer T("sched", "Instruction Scheduling", GroupName,
+ GroupDescription, TimePassesIsEnabled);
Scheduler->Run(CurDAG, FuncInfo->MBB);
}
@@ -876,7 +882,8 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
// inserted into.
MachineBasicBlock *FirstMBB = FuncInfo->MBB, *LastMBB;
{
- NamedRegionTimer T("Instruction Creation", GroupName, TimePassesIsEnabled);
+ NamedRegionTimer T("emit", "Instruction Creation", GroupName,
+ GroupDescription, TimePassesIsEnabled);
// FuncInfo->InsertPt is passed by reference and set to the end of the
// scheduled instructions.
@@ -890,8 +897,8 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
// Free the scheduler state.
{
- NamedRegionTimer T("Instruction Scheduling Cleanup", GroupName,
- TimePassesIsEnabled);
+ NamedRegionTimer T("cleanup", "Instruction Scheduling Cleanup", GroupName,
+ GroupDescription, TimePassesIsEnabled);
delete Scheduler;
}
diff --git a/llvm/lib/IR/LegacyPassManager.cpp b/llvm/lib/IR/LegacyPassManager.cpp
index 458aeb8a38f..628a67bd639 100644
--- a/llvm/lib/IR/LegacyPassManager.cpp
+++ b/llvm/lib/IR/LegacyPassManager.cpp
@@ -449,7 +449,7 @@ class TimingInfo {
TimerGroup TG;
public:
// Use 'create' member to get this.
- TimingInfo() : TG("... Pass execution timing report ...") {}
+ TimingInfo() : TG("pass", "... Pass execution timing report ...") {}
// TimingDtor - Print out information about timing information
~TimingInfo() {
@@ -472,8 +472,10 @@ public:
sys::SmartScopedLock<true> Lock(*TimingInfoMutex);
Timer *&T = TimingData[P];
- if (!T)
- T = new Timer(P->getPassName(), TG);
+ if (!T) {
+ StringRef PassName = P->getPassName();
+ T = new Timer(PassName, PassName, TG);
+ }
return T;
}
};
diff --git a/llvm/lib/IRReader/IRReader.cpp b/llvm/lib/IRReader/IRReader.cpp
index cb29a2552ea..ba587ced718 100644
--- a/llvm/lib/IRReader/IRReader.cpp
+++ b/llvm/lib/IRReader/IRReader.cpp
@@ -26,8 +26,10 @@ namespace llvm {
extern bool TimePassesIsEnabled;
}
-static const char *const TimeIRParsingGroupName = "LLVM IR Parsing";
-static const char *const TimeIRParsingName = "Parse IR";
+static const char *const TimeIRParsingGroupName = "irparse";
+static const char *const TimeIRParsingGroupDescription = "LLVM IR Parsing";
+static const char *const TimeIRParsingName = "parse";
+static const char *const TimeIRParsingDescription = "Parse IR";
static std::unique_ptr<Module>
getLazyIRModule(std::unique_ptr<MemoryBuffer> Buffer, SMDiagnostic &Err,
@@ -67,7 +69,8 @@ std::unique_ptr<Module> llvm::getLazyIRFileModule(StringRef Filename,
std::unique_ptr<Module> llvm::parseIR(MemoryBufferRef Buffer, SMDiagnostic &Err,
LLVMContext &Context) {
- NamedRegionTimer T(TimeIRParsingName, TimeIRParsingGroupName,
+ NamedRegionTimer T(TimeIRParsingName, TimeIRParsingDescription,
+ TimeIRParsingGroupName, TimeIRParsingGroupDescription,
TimePassesIsEnabled);
if (isBitcode((const unsigned char *)Buffer.getBufferStart(),
(const unsigned char *)Buffer.getBufferEnd())) {
diff --git a/llvm/lib/Support/Timer.cpp b/llvm/lib/Support/Timer.cpp
index 548f9da42ee..cca538c3d25 100644
--- a/llvm/lib/Support/Timer.cpp
+++ b/llvm/lib/Support/Timer.cpp
@@ -81,7 +81,7 @@ static TimerGroup *getDefaultTimerGroup() {
sys::SmartScopedLock<true> Lock(*TimerLock);
tmp = DefaultTimerGroup;
if (!tmp) {
- tmp = new TimerGroup("Miscellaneous Ungrouped Timers");
+ tmp = new TimerGroup("misc", "Miscellaneous Ungrouped Timers");
sys::MemoryFence();
DefaultTimerGroup = tmp;
}
@@ -93,13 +93,14 @@ static TimerGroup *getDefaultTimerGroup() {
// Timer Implementation
//===----------------------------------------------------------------------===//
-void Timer::init(StringRef N) {
- init(N, *getDefaultTimerGroup());
+void Timer::init(StringRef Name, StringRef Description) {
+ init(Name, Description, *getDefaultTimerGroup());
}
-void Timer::init(StringRef N, TimerGroup &tg) {
+void Timer::init(StringRef Name, StringRef Description, TimerGroup &tg) {
assert(!TG && "Timer already initialized");
- Name.assign(N.begin(), N.end());
+ this->Name.assign(Name.begin(), Name.end());
+ this->Description.assign(Description.begin(), Description.end());
Running = Triggered = false;
TG = &tg;
TG->addTimer(*this);
@@ -193,17 +194,18 @@ public:
delete I->second.first;
}
- Timer &get(StringRef Name, StringRef GroupName) {
+ Timer &get(StringRef Name, StringRef Description, StringRef GroupName,
+ StringRef GroupDescription) {
sys::SmartScopedLock<true> L(*TimerLock);
std::pair<TimerGroup*, Name2TimerMap> &GroupEntry = Map[GroupName];
if (!GroupEntry.first)
- GroupEntry.first = new TimerGroup(GroupName);
+ GroupEntry.first = new TimerGroup(GroupName, GroupDescription);
Timer &T = GroupEntry.second[Name];
if (!T.isInitialized())
- T.init(Name, *GroupEntry.first);
+ T.init(Name, Description, *GroupEntry.first);
return T;
}
};
@@ -212,9 +214,12 @@ public:
static ManagedStatic<Name2PairMap> NamedGroupedTimers;
-NamedRegionTimer::NamedRegionTimer(StringRef Name, StringRef GroupName,
- bool Enabled)
- : TimeRegion(!Enabled ? nullptr : &NamedGroupedTimers->get(Name, GroupName)){}
+NamedRegionTimer::NamedRegionTimer(StringRef Name, StringRef Description,
+ StringRef GroupName,
+ StringRef GroupDescription, bool Enabled)
+ : TimeRegion(!Enabled ? nullptr
+ : &NamedGroupedTimers->get(Name, Description, GroupName,
+ GroupDescription)) {}
//===----------------------------------------------------------------------===//
// TimerGroup Implementation
@@ -224,9 +229,9 @@ NamedRegionTimer::NamedRegionTimer(StringRef Name, StringRef GroupName,
/// ctor/dtor and is protected by the TimerLock lock.
static TimerGroup *TimerGroupList = nullptr;
-TimerGroup::TimerGroup(StringRef name)
- : Name(name.begin(), name.end()) {
-
+TimerGroup::TimerGroup(StringRef Name, StringRef Description)
+ : Name(Name.begin(), Name.end()),
+ Description(Description.begin(), Description.end()) {
// Add the group to TimerGroupList.
sys::SmartScopedLock<true> L(*TimerLock);
if (TimerGroupList)
@@ -255,7 +260,7 @@ void TimerGroup::removeTimer(Timer &T) {
// If the timer was started, move its data to TimersToPrint.
if (T.hasTriggered())
- TimersToPrint.emplace_back(T.Time, T.Name);
+ TimersToPrint.emplace_back(T.Time, T.Description);
T.TG = nullptr;
@@ -295,9 +300,9 @@ void TimerGroup::PrintQueuedTimers(raw_ostream &OS) {
// Print out timing header.
OS << "===" << std::string(73, '-') << "===\n";
// Figure out how many spaces to indent TimerGroup name.
- unsigned Padding = (80-Name.length())/2;
+ unsigned Padding = (80-Description.length())/2;
if (Padding > 80) Padding = 0; // Don't allow "negative" numbers
- OS.indent(Padding) << Name << '\n';
+ OS.indent(Padding) << Description << '\n';
OS << "===" << std::string(73, '-') << "===\n";
// If this is not an collection of ungrouped times, print the total time.
@@ -340,7 +345,7 @@ void TimerGroup::print(raw_ostream &OS) {
// reset them.
for (Timer *T = FirstTimer; T; T = T->Next) {
if (!T->hasTriggered()) continue;
- TimersToPrint.emplace_back(T->Time, T->Name);
+ TimersToPrint.emplace_back(T->Time, T->Description);
// Clear out the time.
T->clear();
diff --git a/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp b/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp
index 54df36a0ab6..6f2ccfb079c 100644
--- a/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp
@@ -1519,8 +1519,12 @@ bool HexagonGenInsert::runOnMachineFunction(MachineFunction &MF) {
MachineBasicBlock *RootB = MDT->getRoot();
OrderedRegisterList AvailR(CellOrd);
+ const char *const TGName = "hexinsert";
+ const char *const TGDesc = "Generate Insert Instructions";
+
{
- NamedRegionTimer _T("collection", "hexinsert", TimingDetail);
+ NamedRegionTimer _T("collection", "collection", TGName, TGDesc,
+ TimingDetail);
collectInBlock(RootB, AvailR);
// Complete the information gathered in IFMap.
computeRemovableRegisters();
@@ -1535,7 +1539,7 @@ bool HexagonGenInsert::runOnMachineFunction(MachineFunction &MF) {
return Changed;
{
- NamedRegionTimer _T("pruning", "hexinsert", TimingDetail);
+ NamedRegionTimer _T("pruning", "pruning", TGName, TGDesc, TimingDetail);
pruneCandidates();
}
@@ -1548,7 +1552,7 @@ bool HexagonGenInsert::runOnMachineFunction(MachineFunction &MF) {
return Changed;
{
- NamedRegionTimer _T("selection", "hexinsert", TimingDetail);
+ NamedRegionTimer _T("selection", "selection", TGName, TGDesc, TimingDetail);
selectCandidates();
}
@@ -1574,7 +1578,8 @@ bool HexagonGenInsert::runOnMachineFunction(MachineFunction &MF) {
return Changed;
{
- NamedRegionTimer _T("generation", "hexinsert", TimingDetail);
+ NamedRegionTimer _T("generation", "generation", TGName, TGDesc,
+ TimingDetail);
generateInserts();
}
diff --git a/llvm/lib/Target/Hexagon/RDFGraph.cpp b/llvm/lib/Target/Hexagon/RDFGraph.cpp
index 6c5bf711ef5..c696eb6c133 100644
--- a/llvm/lib/Target/Hexagon/RDFGraph.cpp
+++ b/llvm/lib/Target/Hexagon/RDFGraph.cpp
@@ -753,8 +753,7 @@ void RegisterAggr::print(raw_ostream &OS) const {
DataFlowGraph::DataFlowGraph(MachineFunction &mf, const TargetInstrInfo &tii,
const TargetRegisterInfo &tri, const MachineDominatorTree &mdt,
const MachineDominanceFrontier &mdf, const TargetOperandInfo &toi)
- : TimeG("rdf"), LMI(), MF(mf), TII(tii), TRI(tri), MDT(mdt), MDF(mdf),
- TOI(toi) {
+ : LMI(), MF(mf), TII(tii), TRI(tri), MDT(mdt), MDF(mdf), TOI(toi) {
}
diff --git a/llvm/lib/Target/Hexagon/RDFGraph.h b/llvm/lib/Target/Hexagon/RDFGraph.h
index f7171e2dadb..2e9a6cc6720 100644
--- a/llvm/lib/Target/Hexagon/RDFGraph.h
+++ b/llvm/lib/Target/Hexagon/RDFGraph.h
@@ -911,7 +911,6 @@ namespace rdf {
return BlockNodes[BB];
}
- TimerGroup TimeG;
NodeAddr<FuncNode*> Func;
NodeAllocator Memory;
// Local map: MachineBasicBlock -> NodeAddr<BlockNode*>
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