diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrVFP.td | 24 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 36 |
2 files changed, 2 insertions, 58 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrVFP.td b/llvm/lib/Target/ARM/ARMInstrVFP.td index 362ffedf32c..22e157a7480 100644 --- a/llvm/lib/Target/ARM/ARMInstrVFP.td +++ b/llvm/lib/Target/ARM/ARMInstrVFP.td @@ -255,28 +255,6 @@ def VLSTM : AXSI4<(outs), (ins GPRnopc:$Rn, pred:$p), IndexModeNone, let mayStore = 1; } - -// FLDM/FSTM - Load / Store multiple single / double precision registers for -// pre-ARMv6 cores. -// These instructions are deprecated! -def : VFP2MnemonicAlias<"fldmias", "vldmia">; -def : VFP2MnemonicAlias<"fldmdbs", "vldmdb">; -def : VFP2MnemonicAlias<"fldmeas", "vldmdb">; -def : VFP2MnemonicAlias<"fldmfds", "vldmia">; -def : VFP2MnemonicAlias<"fldmiad", "vldmia">; -def : VFP2MnemonicAlias<"fldmdbd", "vldmdb">; -def : VFP2MnemonicAlias<"fldmead", "vldmdb">; -def : VFP2MnemonicAlias<"fldmfdd", "vldmia">; - -def : VFP2MnemonicAlias<"fstmias", "vstmia">; -def : VFP2MnemonicAlias<"fstmdbs", "vstmdb">; -def : VFP2MnemonicAlias<"fstmeas", "vstmia">; -def : VFP2MnemonicAlias<"fstmfds", "vstmdb">; -def : VFP2MnemonicAlias<"fstmiad", "vstmia">; -def : VFP2MnemonicAlias<"fstmdbd", "vstmdb">; -def : VFP2MnemonicAlias<"fstmead", "vstmia">; -def : VFP2MnemonicAlias<"fstmfdd", "vstmdb">; - def : InstAlias<"vpush${p} $r", (VSTMDDB_UPD SP, pred:$p, dpr_reglist:$r), 0>, Requires<[HasVFP2]>; def : InstAlias<"vpush${p} $r", (VSTMSDB_UPD SP, pred:$p, spr_reglist:$r), 0>, @@ -297,6 +275,8 @@ defm : VFPDTAnyInstAlias<"vpop${p}", "$r", // FLDMX, FSTMX - Load and store multiple unknown precision registers for // pre-armv6 cores. // These instruction are deprecated so we don't want them to get selected. +// However, there is no UAL syntax for them, so we keep them around for +// (dis)assembly only. multiclass vfp_ldstx_mult<string asm, bit L_bit> { // Unknown precision def XIA : diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 6974c32d9b7..26fda5f22b4 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -5843,25 +5843,6 @@ static bool doesIgnoreDataTypeSuffix(StringRef Mnemonic, StringRef DT) { static void applyMnemonicAliases(StringRef &Mnemonic, uint64_t Features, unsigned VariantID); -static bool RequiresVFPRegListValidation(StringRef Inst, - bool &AcceptSinglePrecisionOnly, - bool &AcceptDoublePrecisionOnly) { - if (Inst.size() < 7) - return false; - - if (Inst.startswith("fldm") || Inst.startswith("fstm")) { - StringRef AddressingMode = Inst.substr(4, 2); - if (AddressingMode == "ia" || AddressingMode == "db" || - AddressingMode == "ea" || AddressingMode == "fd") { - AcceptSinglePrecisionOnly = Inst[6] == 's'; - AcceptDoublePrecisionOnly = Inst[6] == 'd' || Inst[6] == 'x'; - return true; - } - } - - return false; -} - // The GNU assembler has aliases of ldrd and strd with the second register // omitted. We don't have a way to do that in tablegen, so fix it up here. // @@ -5911,13 +5892,6 @@ void ARMAsmParser::fixupGNULDRDAlias(StringRef Mnemonic, bool ARMAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc, OperandVector &Operands) { MCAsmParser &Parser = getParser(); - // FIXME: Can this be done via tablegen in some fashion? - bool RequireVFPRegisterListCheck; - bool AcceptSinglePrecisionOnly; - bool AcceptDoublePrecisionOnly; - RequireVFPRegisterListCheck = - RequiresVFPRegListValidation(Name, AcceptSinglePrecisionOnly, - AcceptDoublePrecisionOnly); // Apply mnemonic aliases before doing anything else, as the destination // mnemonic may include suffices and we want to handle them normally. @@ -6075,16 +6049,6 @@ bool ARMAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name, if (parseToken(AsmToken::EndOfStatement, "unexpected token in argument list")) return true; - if (RequireVFPRegisterListCheck) { - ARMOperand &Op = static_cast<ARMOperand &>(*Operands.back()); - if (AcceptSinglePrecisionOnly && !Op.isSPRRegList()) - return Error(Op.getStartLoc(), - "VFP/Neon single precision register expected"); - if (AcceptDoublePrecisionOnly && !Op.isDPRRegList()) - return Error(Op.getStartLoc(), - "VFP/Neon double precision register expected"); - } - tryConvertingToTwoOperandForm(Mnemonic, CarrySetting, Operands); // Some instructions, mostly Thumb, have forms for the same mnemonic that |
