diff options
Diffstat (limited to 'llvm/lib')
21 files changed, 212 insertions, 191 deletions
diff --git a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp index 383a8f5bea3..635e9609c40 100644 --- a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp +++ b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp @@ -3000,7 +3000,14 @@ Error BitcodeReader::parseMetadata(bool ModuleLevel) { if (Record.size() < 1) return error("Invalid record"); - IsDistinct = Record[0]; + IsDistinct = Record[0] & 1; + bool HasOpFragment = Record[0] & 2; + auto Elts = MutableArrayRef<uint64_t>(Record).slice(1); + if (!HasOpFragment) + if (unsigned N = Elts.size()) + if (N >= 3 && Elts[N - 3] == dwarf::DW_OP_bit_piece) + Elts[N-3] = dwarf::DW_OP_LLVM_fragment; + MetadataList.assignValue( GET_OR_DISTINCT(DIExpression, (Context, makeArrayRef(Record).slice(1))), diff --git a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp index c324100e1b7..0b5b3bb0cf1 100644 --- a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp +++ b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp @@ -1727,7 +1727,8 @@ void ModuleBitcodeWriter::writeDIExpression(const DIExpression *N, unsigned Abbrev) { Record.reserve(N->getElements().size() + 1); - Record.push_back(N->isDistinct()); + const uint64_t HasOpFragmentFlag = 1 << 1; + Record.push_back(N->isDistinct() | HasOpFragmentFlag); Record.append(N->elements_begin(), N->elements_end()); Stream.EmitRecord(bitc::METADATA_EXPRESSION, Record, Abbrev); diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp index eb70879b15e..b43d73988f4 100644 --- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -713,9 +713,9 @@ static bool emitDebugValueComment(const MachineInstr *MI, AsmPrinter &AP) { OS << V->getName(); const DIExpression *Expr = MI->getDebugExpression(); - if (Expr->isBitPiece()) - OS << " [bit_piece offset=" << Expr->getBitPieceOffset() - << " size=" << Expr->getBitPieceSize() << "]"; + if (Expr->isFragment()) + OS << " [fragment offset=" << Expr->getFragmentOffsetInBits() + << " size=" << Expr->getFragmentSizeInBits() << "]"; OS << " <- "; // The second operand is only an offset if it's an immediate. @@ -724,7 +724,7 @@ static bool emitDebugValueComment(const MachineInstr *MI, AsmPrinter &AP) { for (unsigned i = 0; i < Expr->getNumElements(); ++i) { uint64_t Op = Expr->getElement(i); - if (Op == dwarf::DW_OP_bit_piece) { + if (Op == dwarf::DW_OP_LLVM_fragment) { // There can't be any operands after this in a valid expression break; } else if (Deref) { diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp index 7efe74f15a6..c104c3cd948 100644 --- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp @@ -191,8 +191,8 @@ void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer, "nop (could not find a dwarf register number)"); // Attempt to find a valid super- or sub-register. - if (!Expr.AddMachineRegPiece(*MF->getSubtarget().getRegisterInfo(), - MLoc.getReg())) + if (!Expr.AddMachineRegFragment(*MF->getSubtarget().getRegisterInfo(), + MLoc.getReg())) Expr.EmitOp(dwarf::DW_OP_nop, "nop (could not find a dwarf register number)"); return; diff --git a/llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp b/llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp index 21b78ffd55f..8e170323e5e 100644 --- a/llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp @@ -943,10 +943,10 @@ void CodeViewDebug::collectVariableInfo(const DISubprogram *SP) { bool IsSubfield = false; unsigned StructOffset = 0; - // Handle bitpieces. - if (DIExpr && DIExpr->isBitPiece()) { + // Handle fragments. + if (DIExpr && DIExpr->isFragment()) { IsSubfield = true; - StructOffset = DIExpr->getBitPieceOffset() / 8; + StructOffset = DIExpr->getFragmentOffsetInBits() / 8; } else if (DIExpr && DIExpr->getNumElements() > 0) { continue; // Ignore unrecognized exprs. } @@ -985,7 +985,8 @@ void CodeViewDebug::collectVariableInfo(const DISubprogram *SP) { // This range is valid until the next overlapping bitpiece. In the // common case, ranges will not be bitpieces, so they will overlap. auto J = std::next(I); - while (J != E && !piecesOverlap(DIExpr, J->first->getDebugExpression())) + while (J != E && + !fragmentsOverlap(DIExpr, J->first->getDebugExpression())) ++J; if (J != E) End = getLabelBeforeInsn(J->first); diff --git a/llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp b/llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp index d30f106a939..ce57f1730bf 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp @@ -63,14 +63,12 @@ MCSymbol *DebugHandlerBase::getLabelAfterInsn(const MachineInstr *MI) { return LabelsAfterInsn.lookup(MI); } -// Determine the relative position of the pieces described by P1 and P2. -// Returns -1 if P1 is entirely before P2, 0 if P1 and P2 overlap, -// 1 if P1 is entirely after P2. -int DebugHandlerBase::pieceCmp(const DIExpression *P1, const DIExpression *P2) { - unsigned l1 = P1->getBitPieceOffset(); - unsigned l2 = P2->getBitPieceOffset(); - unsigned r1 = l1 + P1->getBitPieceSize(); - unsigned r2 = l2 + P2->getBitPieceSize(); +int DebugHandlerBase::fragmentCmp(const DIExpression *P1, + const DIExpression *P2) { + unsigned l1 = P1->getFragmentOffsetInBits(); + unsigned l2 = P2->getFragmentOffsetInBits(); + unsigned r1 = l1 + P1->getFragmentSizeInBits(); + unsigned r2 = l2 + P2->getFragmentSizeInBits(); if (r1 <= l2) return -1; else if (r2 <= l1) @@ -79,11 +77,11 @@ int DebugHandlerBase::pieceCmp(const DIExpression *P1, const DIExpression *P2) { return 0; } -/// Determine whether two variable pieces overlap. -bool DebugHandlerBase::piecesOverlap(const DIExpression *P1, const DIExpression *P2) { - if (!P1->isBitPiece() || !P2->isBitPiece()) +bool DebugHandlerBase::fragmentsOverlap(const DIExpression *P1, + const DIExpression *P2) { + if (!P1->isFragment() || !P2->isFragment()) return true; - return pieceCmp(P1, P2) == 0; + return fragmentCmp(P1, P2) == 0; } /// If this type is derived from a base type then return base type size. @@ -142,14 +140,15 @@ void DebugHandlerBase::beginFunction(const MachineFunction *MF) { if (DIVar->isParameter() && getDISubprogram(DIVar->getScope())->describes(MF->getFunction())) { LabelsBeforeInsn[Ranges.front().first] = Asm->getFunctionBegin(); - if (Ranges.front().first->getDebugExpression()->isBitPiece()) { - // Mark all non-overlapping initial pieces. + if (Ranges.front().first->getDebugExpression()->isFragment()) { + // Mark all non-overlapping initial fragments. for (auto I = Ranges.begin(); I != Ranges.end(); ++I) { - const DIExpression *Piece = I->first->getDebugExpression(); + const DIExpression *Fragment = I->first->getDebugExpression(); if (std::all_of(Ranges.begin(), I, [&](DbgValueHistoryMap::InstrRange Pred) { - return !piecesOverlap(Piece, Pred.first->getDebugExpression()); - })) + return !fragmentsOverlap( + Fragment, Pred.first->getDebugExpression()); + })) LabelsBeforeInsn[I->first] = Asm->getFunctionBegin(); else break; diff --git a/llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.h b/llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.h index b8bbcec133f..7219b05d33c 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.h +++ b/llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.h @@ -92,13 +92,13 @@ public: /// Return Label immediately following the instruction. MCSymbol *getLabelAfterInsn(const MachineInstr *MI); - /// Determine the relative position of the pieces described by P1 and P2. - /// Returns -1 if P1 is entirely before P2, 0 if P1 and P2 overlap, - /// 1 if P1 is entirely after P2. - static int pieceCmp(const DIExpression *P1, const DIExpression *P2); + /// Determine the relative position of the fragments described by P1 and P2. + /// Returns -1 if P1 is entirely before P2, 0 if P1 and P2 overlap, 1 if P1 is + /// entirely after P2. + static int fragmentCmp(const DIExpression *P1, const DIExpression *P2); - /// Determine whether two variable pieces overlap. - static bool piecesOverlap(const DIExpression *P1, const DIExpression *P2); + /// Determine whether two variable fragments overlap. + static bool fragmentsOverlap(const DIExpression *P1, const DIExpression *P2); /// If this type is derived from a base type then return base type size. static uint64_t getBaseTypeSize(const DITypeRef TyRef); diff --git a/llvm/lib/CodeGen/AsmPrinter/DebugLocEntry.h b/llvm/lib/CodeGen/AsmPrinter/DebugLocEntry.h index dd12c3271ca..9444fad048f 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DebugLocEntry.h +++ b/llvm/lib/CodeGen/AsmPrinter/DebugLocEntry.h @@ -72,7 +72,7 @@ public: const ConstantFP *getConstantFP() const { return Constant.CFP; } const ConstantInt *getConstantInt() const { return Constant.CIP; } MachineLocation getLoc() const { return Loc; } - bool isBitPiece() const { return getExpression()->isBitPiece(); } + bool isFragment() const { return getExpression()->isFragment(); } const DIExpression *getExpression() const { return Expression; } friend bool operator==(const Value &, const Value &); friend bool operator<(const Value &, const Value &); @@ -129,7 +129,7 @@ public: Values.append(Vals.begin(), Vals.end()); sortUniqueValues(); assert(all_of(Values, [](DebugLocEntry::Value V) { - return V.isBitPiece(); + return V.isFragment(); }) && "value must be a piece"); } @@ -172,11 +172,11 @@ inline bool operator==(const DebugLocEntry::Value &A, llvm_unreachable("unhandled EntryKind"); } -/// \brief Compare two pieces based on their offset. +/// Compare two fragments based on their offset. inline bool operator<(const DebugLocEntry::Value &A, const DebugLocEntry::Value &B) { - return A.getExpression()->getBitPieceOffset() < - B.getExpression()->getBitPieceOffset(); + return A.getExpression()->getFragmentOffsetInBits() < + B.getExpression()->getFragmentOffsetInBits(); } } diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp index 84981ac16ac..c615cea1d7c 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp @@ -730,7 +730,7 @@ void DwarfCompileUnit::addAddress(DIE &Die, dwarf::Attribute Attribute, bool validReg; if (Location.isReg()) - validReg = addRegisterOpPiece(*Loc, Location.getReg()); + validReg = addRegisterFragment(*Loc, Location.getReg()); else validReg = addRegisterOffset(*Loc, Location.getReg(), Location.getOffset()); diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp index acb8ce0c73e..91b30babe0e 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp @@ -776,7 +776,7 @@ static DebugLocEntry::Value getDebugLocValue(const MachineInstr *MI) { llvm_unreachable("Unexpected 4-operand DBG_VALUE instruction!"); } -/// \brief If this and Next are describing different pieces of the same +/// \brief If this and Next are describing different fragments of the same /// variable, merge them by appending Next's values to the current /// list of values. /// Return true if the merge was successful. @@ -784,15 +784,15 @@ bool DebugLocEntry::MergeValues(const DebugLocEntry &Next) { if (Begin == Next.Begin) { auto *FirstExpr = cast<DIExpression>(Values[0].Expression); auto *FirstNextExpr = cast<DIExpression>(Next.Values[0].Expression); - if (!FirstExpr->isBitPiece() || !FirstNextExpr->isBitPiece()) + if (!FirstExpr->isFragment() || !FirstNextExpr->isFragment()) return false; - // We can only merge entries if none of the pieces overlap any others. + // We can only merge entries if none of the fragments overlap any others. // In doing so, we can take advantage of the fact that both lists are // sorted. for (unsigned i = 0, j = 0; i < Values.size(); ++i) { for (; j < Next.Values.size(); ++j) { - int res = DebugHandlerBase::pieceCmp( + int res = DebugHandlerBase::fragmentCmp( cast<DIExpression>(Values[i].Expression), cast<DIExpression>(Next.Values[j].Expression)); if (res == 0) // The two expressions overlap, we can't merge. @@ -815,27 +815,27 @@ bool DebugLocEntry::MergeValues(const DebugLocEntry &Next) { /// Build the location list for all DBG_VALUEs in the function that /// describe the same variable. If the ranges of several independent -/// pieces of the same variable overlap partially, split them up and +/// fragments of the same variable overlap partially, split them up and /// combine the ranges. The resulting DebugLocEntries are will have /// strict monotonically increasing begin addresses and will never /// overlap. // // Input: // -// Ranges History [var, loc, piece ofs size] -// 0 | [x, (reg0, piece 0, 32)] -// 1 | | [x, (reg1, piece 32, 32)] <- IsPieceOfPrevEntry +// Ranges History [var, loc, fragment ofs size] +// 0 | [x, (reg0, fragment 0, 32)] +// 1 | | [x, (reg1, fragment 32, 32)] <- IsFragmentOfPrevEntry // 2 | | ... // 3 | [clobber reg0] -// 4 [x, (mem, piece 0, 64)] <- overlapping with both previous pieces of +// 4 [x, (mem, fragment 0, 64)] <- overlapping with both previous fragments of // x. // // Output: // -// [0-1] [x, (reg0, piece 0, 32)] -// [1-3] [x, (reg0, piece 0, 32), (reg1, piece 32, 32)] -// [3-4] [x, (reg1, piece 32, 32)] -// [4- ] [x, (mem, piece 0, 64)] +// [0-1] [x, (reg0, fragment 0, 32)] +// [1-3] [x, (reg0, fragment 0, 32), (reg1, fragment 32, 32)] +// [3-4] [x, (reg1, fragment 32, 32)] +// [4- ] [x, (mem, fragment 0, 64)] void DwarfDebug::buildLocationList(SmallVectorImpl<DebugLocEntry> &DebugLoc, const DbgValueHistoryMap::InstrRanges &Ranges) { @@ -853,10 +853,10 @@ DwarfDebug::buildLocationList(SmallVectorImpl<DebugLocEntry> &DebugLoc, continue; } - // If this piece overlaps with any open ranges, truncate them. + // If this fragment overlaps with any open ranges, truncate them. const DIExpression *DIExpr = Begin->getDebugExpression(); auto Last = remove_if(OpenRanges, [&](DebugLocEntry::Value R) { - return piecesOverlap(DIExpr, R.getExpression()); + return fragmentsOverlap(DIExpr, R.getExpression()); }); OpenRanges.erase(Last, OpenRanges.end()); @@ -878,12 +878,12 @@ DwarfDebug::buildLocationList(SmallVectorImpl<DebugLocEntry> &DebugLoc, DebugLocEntry Loc(StartLabel, EndLabel, Value); bool couldMerge = false; - // If this is a piece, it may belong to the current DebugLocEntry. - if (DIExpr->isBitPiece()) { + // If this is a fragment, it may belong to the current DebugLocEntry. + if (DIExpr->isFragment()) { // Add this value to the list of open ranges. OpenRanges.push_back(Value); - // Attempt to add the piece to the last entry. + // Attempt to add the fragment to the last entry. if (!DebugLoc.empty()) if (DebugLoc.back().MergeValues(Loc)) couldMerge = true; @@ -891,7 +891,7 @@ DwarfDebug::buildLocationList(SmallVectorImpl<DebugLocEntry> &DebugLoc, if (!couldMerge) { // Need to add a new DebugLocEntry. Add all values from still - // valid non-overlapping pieces. + // valid non-overlapping fragments. if (OpenRanges.size()) Loc.addValues(OpenRanges); @@ -1413,7 +1413,7 @@ void DwarfDebug::emitDebugLocEntry(ByteStreamer &Streamer, static void emitDebugLocValue(const AsmPrinter &AP, const DIBasicType *BT, ByteStreamer &Streamer, const DebugLocEntry::Value &Value, - unsigned PieceOffsetInBits) { + unsigned FragmentOffsetInBits) { DIExpressionCursor ExprCursor(Value.getExpression()); DebugLocDwarfExpression DwarfExpr(AP.getDwarfVersion(), Streamer); // Regular entry. @@ -1435,13 +1435,13 @@ static void emitDebugLocValue(const AsmPrinter &AP, const DIBasicType *BT, DwarfExpr.AddMachineRegIndirect(TRI, Loc.getReg(), Loc.getOffset()); else DwarfExpr.AddMachineRegExpression(TRI, ExprCursor, Loc.getReg(), - PieceOffsetInBits); + FragmentOffsetInBits); } } else if (Value.isConstantFP()) { APInt RawBytes = Value.getConstantFP()->getValueAPF().bitcastToAPInt(); DwarfExpr.AddUnsignedConstant(RawBytes); } - DwarfExpr.AddExpression(std::move(ExprCursor), PieceOffsetInBits); + DwarfExpr.AddExpression(std::move(ExprCursor), FragmentOffsetInBits); } void DebugLocEntry::finalize(const AsmPrinter &AP, @@ -1450,32 +1450,32 @@ void DebugLocEntry::finalize(const AsmPrinter &AP, DebugLocStream::EntryBuilder Entry(List, Begin, End); BufferByteStreamer Streamer = Entry.getStreamer(); const DebugLocEntry::Value &Value = Values[0]; - if (Value.isBitPiece()) { - // Emit all pieces that belong to the same variable and range. + if (Value.isFragment()) { + // Emit all fragments that belong to the same variable and range. assert(all_of(Values, [](DebugLocEntry::Value P) { - return P.isBitPiece(); - }) && "all values are expected to be pieces"); + return P.isFragment(); + }) && "all values are expected to be fragments"); assert(std::is_sorted(Values.begin(), Values.end()) && - "pieces are expected to be sorted"); + "fragments are expected to be sorted"); unsigned Offset = 0; - for (auto Piece : Values) { - const DIExpression *Expr = Piece.getExpression(); - unsigned PieceOffset = Expr->getBitPieceOffset(); - unsigned PieceSize = Expr->getBitPieceSize(); - assert(Offset <= PieceOffset && "overlapping or duplicate pieces"); - if (Offset < PieceOffset) { - // The DWARF spec seriously mandates pieces with no locations for gaps. + for (auto Fragment : Values) { + const DIExpression *Expr = Fragment.getExpression(); + unsigned FragmentOffset = Expr->getFragmentOffsetInBits(); + unsigned FragmentSize = Expr->getFragmentSizeInBits(); + assert(Offset <= FragmentOffset && "overlapping or duplicate fragments"); + if (Offset < FragmentOffset) { + // DWARF represents gaps as pieces with no locations. DebugLocDwarfExpression Expr(AP.getDwarfVersion(), Streamer); - Expr.AddOpPiece(PieceOffset-Offset, 0); - Offset += PieceOffset-Offset; + Expr.AddOpPiece(FragmentOffset-Offset, 0); + Offset += FragmentOffset-Offset; } - Offset += PieceSize; + Offset += FragmentSize; - emitDebugLocValue(AP, BT, Streamer, Piece, PieceOffset); + emitDebugLocValue(AP, BT, Streamer, Fragment, FragmentOffset); } } else { - assert(Values.size() == 1 && "only pieces may have >1 value"); + assert(Values.size() == 1 && "only fragments may have >1 value"); emitDebugLocValue(AP, BT, Streamer, Value, 0); } } diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h index 3a9fa8b9726..51eca07404e 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h +++ b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h @@ -135,7 +135,7 @@ public: Expr.append(V.Expr.begin(), V.Expr.end()); FrameIndex.append(V.FrameIndex.begin(), V.FrameIndex.end()); assert(all_of(Expr, [](const DIExpression *E) { - return E && E->isBitPiece(); + return E && E->isFragment(); }) && "conflicting locations for variable"); } diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp index 12273aa1824..fe999efa2c9 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp @@ -82,10 +82,10 @@ bool DwarfExpression::AddMachineRegIndirect(const TargetRegisterInfo &TRI, return true; } -bool DwarfExpression::AddMachineRegPiece(const TargetRegisterInfo &TRI, - unsigned MachineReg, - unsigned PieceSizeInBits, - unsigned PieceOffsetInBits) { +bool DwarfExpression::AddMachineRegFragment(const TargetRegisterInfo &TRI, + unsigned MachineReg, + unsigned FragmentSizeInBits, + unsigned FragmentOffsetInBits) { if (!TRI.isPhysicalRegister(MachineReg)) return false; @@ -94,13 +94,13 @@ bool DwarfExpression::AddMachineRegPiece(const TargetRegisterInfo &TRI, // If this is a valid register number, emit it. if (Reg >= 0) { AddReg(Reg); - if (PieceSizeInBits) - AddOpPiece(PieceSizeInBits, PieceOffsetInBits); + if (FragmentSizeInBits) + AddOpPiece(FragmentSizeInBits, FragmentOffsetInBits); return true; } // Walk up the super-register chain until we find a valid number. - // For example, EAX on x86_64 is a 32-bit piece of RAX with offset 0. + // For example, EAX on x86_64 is a 32-bit fragment of RAX with offset 0. for (MCSuperRegIterator SR(MachineReg, &TRI); SR.isValid(); ++SR) { Reg = TRI.getDwarfRegNum(*SR, false); if (Reg >= 0) { @@ -108,16 +108,16 @@ bool DwarfExpression::AddMachineRegPiece(const TargetRegisterInfo &TRI, unsigned Size = TRI.getSubRegIdxSize(Idx); unsigned RegOffset = TRI.getSubRegIdxOffset(Idx); AddReg(Reg, "super-register"); - if (PieceOffsetInBits == RegOffset) { + if (FragmentOffsetInBits == RegOffset) { AddOpPiece(Size, RegOffset); } else { - // If this is part of a variable in a sub-register at a - // non-zero offset, we need to manually shift the value into - // place, since the DW_OP_piece describes the part of the - // variable, not the position of the subregister. + // If this is part of a variable in a sub-register at a non-zero offset, + // we need to manually shift the value into place, since the + // DW_OP_LLVM_fragment describes the part of the variable, not the + // position of the subregister. if (RegOffset) AddShr(RegOffset); - AddOpPiece(Size, PieceOffsetInBits); + AddOpPiece(Size, FragmentOffsetInBits); } return true; } @@ -125,10 +125,7 @@ bool DwarfExpression::AddMachineRegPiece(const TargetRegisterInfo &TRI, // Otherwise, attempt to find a covering set of sub-register numbers. // For example, Q0 on ARM is a composition of D0+D1. - // - // Keep track of the current position so we can emit the more - // efficient DW_OP_piece. - unsigned CurPos = PieceOffsetInBits; + unsigned CurPos = FragmentOffsetInBits; // The size of the register in bits, assuming 8 bits per byte. unsigned RegSize = TRI.getMinimalPhysRegClass(MachineReg)->getSize() * 8; // Keep track of the bits in the register we already emitted, so we @@ -158,7 +155,7 @@ bool DwarfExpression::AddMachineRegPiece(const TargetRegisterInfo &TRI, } } - return CurPos > PieceOffsetInBits; + return CurPos > FragmentOffsetInBits; } void DwarfExpression::AddStackValue() { @@ -195,31 +192,31 @@ void DwarfExpression::AddUnsignedConstant(const APInt &Value) { } static unsigned getOffsetOrZero(unsigned OffsetInBits, - unsigned PieceOffsetInBits) { - if (OffsetInBits == PieceOffsetInBits) + unsigned FragmentOffsetInBits) { + if (OffsetInBits == FragmentOffsetInBits) return 0; - assert(OffsetInBits >= PieceOffsetInBits && "overlapping pieces"); + assert(OffsetInBits >= FragmentOffsetInBits && "overlapping fragments"); return OffsetInBits; } bool DwarfExpression::AddMachineRegExpression(const TargetRegisterInfo &TRI, DIExpressionCursor &ExprCursor, unsigned MachineReg, - unsigned PieceOffsetInBits) { + unsigned FragmentOffsetInBits) { if (!ExprCursor) - return AddMachineRegPiece(TRI, MachineReg); + return AddMachineRegFragment(TRI, MachineReg); // Pattern-match combinations for which more efficient representations exist // first. bool ValidReg = false; auto Op = ExprCursor.peek(); switch (Op->getOp()) { - case dwarf::DW_OP_bit_piece: { + case dwarf::DW_OP_LLVM_fragment: { unsigned OffsetInBits = Op->getArg(0); unsigned SizeInBits = Op->getArg(1); // Piece always comes at the end of the expression. - AddMachineRegPiece(TRI, MachineReg, SizeInBits, - getOffsetOrZero(OffsetInBits, PieceOffsetInBits)); + AddMachineRegFragment(TRI, MachineReg, SizeInBits, + getOffsetOrZero(OffsetInBits, FragmentOffsetInBits)); ExprCursor.take(); break; } @@ -234,7 +231,7 @@ bool DwarfExpression::AddMachineRegExpression(const TargetRegisterInfo &TRI, TRI, MachineReg, Op->getOp() == dwarf::DW_OP_plus ? Offset : -Offset); ExprCursor.consume(2); } else - ValidReg = AddMachineRegPiece(TRI, MachineReg); + ValidReg = AddMachineRegFragment(TRI, MachineReg); break; } case dwarf::DW_OP_deref: @@ -248,14 +245,15 @@ bool DwarfExpression::AddMachineRegExpression(const TargetRegisterInfo &TRI, } void DwarfExpression::AddExpression(DIExpressionCursor &&ExprCursor, - unsigned PieceOffsetInBits) { + unsigned FragmentOffsetInBits) { while (ExprCursor) { auto Op = ExprCursor.take(); switch (Op->getOp()) { - case dwarf::DW_OP_bit_piece: { + case dwarf::DW_OP_LLVM_fragment: { unsigned OffsetInBits = Op->getArg(0); unsigned SizeInBits = Op->getArg(1); - AddOpPiece(SizeInBits, getOffsetOrZero(OffsetInBits, PieceOffsetInBits)); + AddOpPiece(SizeInBits, + getOffsetOrZero(OffsetInBits, FragmentOffsetInBits)); break; } case dwarf::DW_OP_plus: diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h b/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h index 06fa59bced1..b24074bc918 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h +++ b/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h @@ -76,7 +76,6 @@ public: /// entry. class DwarfExpression { protected: - // Various convenience accessors that extract things out of AsmPrinter. unsigned DwarfVersion; public: @@ -98,10 +97,14 @@ public: /// Emit an (double-)indirect dwarf register operation. void AddRegIndirect(int DwarfReg, int Offset, bool Deref = false); - /// Emit DW_OP_piece operation. + /// Emit a DW_OP_piece operation for a variable fragment. + /// \param OffsetInBits This is the offset where the fragment appears + /// inside the *source variable*. void AddOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0); + /// Emit a shift-right dwarf expression. void AddShr(unsigned ShiftBy); + /// Emit a DW_OP_stack_value, if supported. /// /// The proper way to describe a constant value is DW_OP_constu <const>, @@ -121,22 +124,22 @@ public: int Offset = 0); /// Emit a partial DWARF register operation. - /// \param MachineReg the register - /// \param PieceSizeInBits size and - /// \param PieceOffsetInBits offset of the piece in bits, if this is one - /// piece of an aggregate value. /// - /// If size and offset is zero an operation for the entire - /// register is emitted: Some targets do not provide a DWARF - /// register number for every register. If this is the case, this - /// function will attempt to emit a DWARF register by emitting a - /// piece of a super-register or by piecing together multiple - /// subregisters that alias the register. + /// \param MachineReg the register, + /// \param FragmentSizeInBits size and + /// \param FragmentOffsetInBits offset of the fragment in bits, if this is + /// a fragment of an aggregate value. + /// + /// If size and offset is zero an operation for the entire register is + /// emitted: Some targets do not provide a DWARF register number for every + /// register. If this is the case, this function will attempt to emit a DWARF + /// register by emitting a fragment of a super-register or by piecing together + /// multiple subregisters that alias the register. /// /// \return false if no DWARF register exists for MachineReg. - bool AddMachineRegPiece(const TargetRegisterInfo &TRI, unsigned MachineReg, - unsigned PieceSizeInBits = 0, - unsigned PieceOffsetInBits = 0); + bool AddMachineRegFragment(const TargetRegisterInfo &TRI, unsigned MachineReg, + unsigned FragmentSizeInBits = 0, + unsigned FragmentOffsetInBits = 0); /// Emit a signed constant. void AddSignedConstant(int64_t Value); @@ -149,17 +152,21 @@ public: /// the prefix of a DwarfExpression if a more efficient representation for /// combining the register location and the first operation exists. /// - /// \param PieceOffsetInBits If this is one piece out of a fragmented - /// location, this is the offset of the piece inside the entire variable. - /// \return false if no DWARF register exists for MachineReg. + /// \param FragmentOffsetInBits If this is one fragment out of a fragmented + /// location, this is the offset of the + /// fragment inside the entire variable. + /// \return false if no DWARF register exists + /// for MachineReg. bool AddMachineRegExpression(const TargetRegisterInfo &TRI, DIExpressionCursor &Expr, unsigned MachineReg, - unsigned PieceOffsetInBits = 0); + unsigned FragmentOffsetInBits = 0); /// Emit all remaining operations in the DIExpressionCursor. - /// \param PieceOffsetInBits If this is one piece out of a fragmented - /// location, this is the offset of the piece inside the entire variable. + /// + /// \param FragmentOffsetInBits If this is one fragment out of multiple + /// locations, this is the offset of the + /// fragment inside the entire variable. void AddExpression(DIExpressionCursor &&Expr, - unsigned PieceOffsetInBits = 0); + unsigned FragmentOffsetInBits = 0); }; /// DwarfExpression implementation for .debug_loc entries. diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp index b6b72b95bff..68fb5c986f9 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp @@ -371,11 +371,12 @@ void DwarfUnit::addSourceLine(DIE &Die, const DINamespace *NS) { addSourceLine(Die, NS->getLine(), NS->getFilename(), NS->getDirectory()); } -bool DwarfUnit::addRegisterOpPiece(DIELoc &TheDie, unsigned Reg, - unsigned SizeInBits, unsigned OffsetInBits) { +bool DwarfUnit::addRegisterFragment(DIELoc &TheDie, unsigned Reg, + unsigned SizeInBits, + unsigned OffsetInBits) { DIEDwarfExpression Expr(*Asm, *this, TheDie); - Expr.AddMachineRegPiece(*Asm->MF->getSubtarget().getRegisterInfo(), Reg, - SizeInBits, OffsetInBits); + Expr.AddMachineRegFragment(*Asm->MF->getSubtarget().getRegisterInfo(), Reg, + SizeInBits, OffsetInBits); return true; } @@ -481,7 +482,7 @@ void DwarfUnit::addBlockByrefAddress(const DbgVariable &DV, DIE &Die, bool validReg; if (Location.isReg()) - validReg = addRegisterOpPiece(*Loc, Location.getReg()); + validReg = addRegisterFragment(*Loc, Location.getReg()); else validReg = addRegisterOffset(*Loc, Location.getReg(), Location.getOffset()); diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h b/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h index f365930b603..ed975cc80e1 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h +++ b/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h @@ -235,11 +235,13 @@ public: /// Add template parameters in buffer. void addTemplateParams(DIE &Buffer, DINodeArray TParams); - /// Add register operand. + /// Add register operand for a source variable fragment of the specified size + /// and offset. + /// /// \returns false if the register does not exist, e.g., because it was never - /// materialized. - bool addRegisterOpPiece(DIELoc &TheDie, unsigned Reg, - unsigned SizeInBits = 0, unsigned OffsetInBits = 0); + /// materialized. + bool addRegisterFragment(DIELoc &TheDie, unsigned Reg, + unsigned SizeInBits = 0, unsigned OffsetInBits = 0); /// Add register offset. /// \returns false if the register does not exist, e.g., because it was never diff --git a/llvm/lib/IR/DIBuilder.cpp b/llvm/lib/IR/DIBuilder.cpp index aa67da2a3e0..650a255b6df 100644 --- a/llvm/lib/IR/DIBuilder.cpp +++ b/llvm/lib/IR/DIBuilder.cpp @@ -616,9 +616,9 @@ DIExpression *DIBuilder::createExpression(ArrayRef<int64_t> Signed) { return createExpression(Addr); } -DIExpression *DIBuilder::createBitPieceExpression(unsigned OffsetInBytes, +DIExpression *DIBuilder::createFragmentExpression(unsigned OffsetInBytes, unsigned SizeInBytes) { - uint64_t Addr[] = {dwarf::DW_OP_bit_piece, OffsetInBytes, SizeInBytes}; + uint64_t Addr[] = {dwarf::DW_OP_LLVM_fragment, OffsetInBytes, SizeInBytes}; return DIExpression::get(VMContext, Addr); } diff --git a/llvm/lib/IR/DebugInfoMetadata.cpp b/llvm/lib/IR/DebugInfoMetadata.cpp index 278eb898966..fe61c279778 100644 --- a/llvm/lib/IR/DebugInfoMetadata.cpp +++ b/llvm/lib/IR/DebugInfoMetadata.cpp @@ -559,7 +559,7 @@ DIExpression *DIExpression::getImpl(LLVMContext &Context, unsigned DIExpression::ExprOperand::getSize() const { switch (getOp()) { - case dwarf::DW_OP_bit_piece: + case dwarf::DW_OP_LLVM_fragment: return 3; case dwarf::DW_OP_constu: case dwarf::DW_OP_plus: @@ -580,9 +580,9 @@ bool DIExpression::isValid() const { switch (I->getOp()) { default: return false; - case dwarf::DW_OP_bit_piece: + case dwarf::DW_OP_LLVM_fragment: case dwarf::DW_OP_stack_value: - // We only support bit piece and stack value expressions which appear at + // We only support fragment and stack value expressions which appear at // the end. return I->get() + I->getSize() == E->get(); case dwarf::DW_OP_constu: @@ -595,21 +595,21 @@ bool DIExpression::isValid() const { return true; } -bool DIExpression::isBitPiece() const { +bool DIExpression::isFragment() const { assert(isValid() && "Expected valid expression"); if (unsigned N = getNumElements()) if (N >= 3) - return getElement(N - 3) == dwarf::DW_OP_bit_piece; + return getElement(N - 3) == dwarf::DW_OP_LLVM_fragment; return false; } -uint64_t DIExpression::getBitPieceOffset() const { - assert(isBitPiece() && "Expected bit piece"); +uint64_t DIExpression::getFragmentOffsetInBits() const { + assert(isFragment() && "Expected fragment"); return getElement(getNumElements() - 2); } -uint64_t DIExpression::getBitPieceSize() const { - assert(isBitPiece() && "Expected bit piece"); +uint64_t DIExpression::getFragmentSizeInBits() const { + assert(isFragment() && "Expected fragment"); return getElement(getNumElements() - 1); } diff --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp index 2f819f78c21..6f7e344b1b3 100644 --- a/llvm/lib/IR/Verifier.cpp +++ b/llvm/lib/IR/Verifier.cpp @@ -483,7 +483,7 @@ private: void verifyFrameRecoverIndices(); void verifySiblingFuncletUnwinds(); - void verifyBitPieceExpression(const DbgInfoIntrinsic &I); + void verifyFragmentExpression(const DbgInfoIntrinsic &I); /// Module-level debug info verification... void verifyCompileUnits(); @@ -3826,7 +3826,7 @@ void Verifier::visitInstruction(Instruction &I) { } if (auto *DII = dyn_cast<DbgInfoIntrinsic>(&I)) - verifyBitPieceExpression(*DII); + verifyFragmentExpression(*DII); InstsInThisBlock.insert(&I); } @@ -4307,7 +4307,7 @@ static uint64_t getVariableSize(const DILocalVariable &V) { return 0; } -void Verifier::verifyBitPieceExpression(const DbgInfoIntrinsic &I) { +void Verifier::verifyFragmentExpression(const DbgInfoIntrinsic &I) { DILocalVariable *V; DIExpression *E; if (auto *DVI = dyn_cast<DbgValueInst>(&I)) { @@ -4324,7 +4324,7 @@ void Verifier::verifyBitPieceExpression(const DbgInfoIntrinsic &I) { return; // Nothing to do if this isn't a bit piece expression. - if (!E->isBitPiece()) + if (!E->isFragment()) return; // The frontend helps out GDB by emitting the members of local anonymous @@ -4342,11 +4342,11 @@ void Verifier::verifyBitPieceExpression(const DbgInfoIntrinsic &I) { if (!VarSize) return; - unsigned PieceSize = E->getBitPieceSize(); - unsigned PieceOffset = E->getBitPieceOffset(); - AssertDI(PieceSize + PieceOffset <= VarSize, - "piece is larger than or outside of variable", &I, V, E); - AssertDI(PieceSize != VarSize, "piece covers entire variable", &I, V, E); + unsigned FragSize = E->getFragmentSizeInBits(); + unsigned FragOffset = E->getFragmentOffsetInBits(); + AssertDI(FragSize + FragOffset <= VarSize, + "fragment is larger than or outside of variable", &I, V, E); + AssertDI(FragSize != VarSize, "fragment covers entire variable", &I, V, E); } void Verifier::verifyCompileUnits() { diff --git a/llvm/lib/Support/Dwarf.cpp b/llvm/lib/Support/Dwarf.cpp index f94cc18b3c9..8950e8c919a 100644 --- a/llvm/lib/Support/Dwarf.cpp +++ b/llvm/lib/Support/Dwarf.cpp @@ -74,6 +74,8 @@ StringRef llvm::dwarf::OperationEncodingString(unsigned Encoding) { case DW_OP_##NAME: \ return "DW_OP_" #NAME; #include "llvm/Support/Dwarf.def" + case DW_OP_LLVM_fragment: + return "DW_OP_LLVM_fragment"; } } @@ -81,6 +83,7 @@ unsigned llvm::dwarf::getOperationEncoding(StringRef OperationEncodingString) { return StringSwitch<unsigned>(OperationEncodingString) #define HANDLE_DW_OP(ID, NAME) .Case("DW_OP_" #NAME, DW_OP_##NAME) #include "llvm/Support/Dwarf.def" + .Case("DW_OP_LLVM_fragment", DW_OP_LLVM_fragment) .Default(0); } diff --git a/llvm/lib/Transforms/Scalar/SROA.cpp b/llvm/lib/Transforms/Scalar/SROA.cpp index 1f9d08528ef..887818bfdde 100644 --- a/llvm/lib/Transforms/Scalar/SROA.cpp +++ b/llvm/lib/Transforms/Scalar/SROA.cpp @@ -3982,16 +3982,16 @@ bool SROA::splitAlloca(AllocaInst &AI, AllocaSlices &AS) { if (!IsSorted) std::sort(AS.begin(), AS.end()); - /// \brief Describes the allocas introduced by rewritePartition - /// in order to migrate the debug info. - struct Piece { + /// Describes the allocas introduced by rewritePartition in order to migrate + /// the debug info. + struct Fragment { AllocaInst *Alloca; uint64_t Offset; uint64_t Size; - Piece(AllocaInst *AI, uint64_t O, uint64_t S) + Fragment(AllocaInst *AI, uint64_t O, uint64_t S) : Alloca(AI), Offset(O), Size(S) {} }; - SmallVector<Piece, 4> Pieces; + SmallVector<Fragment, 4> Fragments; // Rewrite each partition. for (auto &P : AS.partitions()) { @@ -4002,7 +4002,7 @@ bool SROA::splitAlloca(AllocaInst &AI, AllocaSlices &AS) { uint64_t AllocaSize = DL.getTypeSizeInBits(NewAI->getAllocatedType()); // Don't include any padding. uint64_t Size = std::min(AllocaSize, P.size() * SizeOfByte); - Pieces.push_back(Piece(NewAI, P.beginOffset() * SizeOfByte, Size)); + Fragments.push_back(Fragment(NewAI, P.beginOffset() * SizeOfByte, Size)); } } ++NumPartitions; @@ -4019,32 +4019,34 @@ bool SROA::splitAlloca(AllocaInst &AI, AllocaSlices &AS) { auto *Expr = DbgDecl->getExpression(); DIBuilder DIB(*AI.getModule(), /*AllowUnresolved*/ false); uint64_t AllocaSize = DL.getTypeSizeInBits(AI.getAllocatedType()); - for (auto Piece : Pieces) { - // Create a piece expression describing the new partition or reuse AI's + for (auto Fragment : Fragments) { + // Create a fragment expression describing the new partition or reuse AI's // expression if there is only one partition. - auto *PieceExpr = Expr; - if (Piece.Size < AllocaSize || Expr->isBitPiece()) { + auto *FragmentExpr = Expr; + if (Fragment.Size < AllocaSize || Expr->isFragment()) { // If this alloca is already a scalar replacement of a larger aggregate, - // Piece.Offset describes the offset inside the scalar. - uint64_t Offset = Expr->isBitPiece() ? Expr->getBitPieceOffset() : 0; - uint64_t Start = Offset + Piece.Offset; - uint64_t Size = Piece.Size; - if (Expr->isBitPiece()) { - uint64_t AbsEnd = Expr->getBitPieceOffset() + Expr->getBitPieceSize(); + // Fragment.Offset describes the offset inside the scalar. + uint64_t Offset = + Expr->isFragment() ? Expr->getFragmentOffsetInBits() : 0; + uint64_t Start = Offset + Fragment.Offset; + uint64_t Size = Fragment.Size; + if (Expr->isFragment()) { + uint64_t AbsEnd = + Expr->getFragmentOffsetInBits() + Expr->getFragmentSizeInBits(); if (Start >= AbsEnd) // No need to describe a SROAed padding. continue; Size = std::min(Size, AbsEnd - Start); } - PieceExpr = DIB.createBitPieceExpression(Start, Size); + FragmentExpr = DIB.createFragmentExpression(Start, Size); } // Remove any existing dbg.declare intrinsic describing the same alloca. - if (DbgDeclareInst *OldDDI = FindAllocaDbgDeclare(Piece.Alloca)) + if (DbgDeclareInst *OldDDI = FindAllocaDbgDeclare(Fragment.Alloca)) OldDDI->eraseFromParent(); - DIB.insertDeclare(Piece.Alloca, Var, PieceExpr, DbgDecl->getDebugLoc(), - &AI); + DIB.insertDeclare(Fragment.Alloca, Var, FragmentExpr, + DbgDecl->getDebugLoc(), &AI); } } return Changed; diff --git a/llvm/lib/Transforms/Utils/Local.cpp b/llvm/lib/Transforms/Utils/Local.cpp index 01a5579e1ed..6de0f34e94c 100644 --- a/llvm/lib/Transforms/Utils/Local.cpp +++ b/llvm/lib/Transforms/Utils/Local.cpp @@ -1102,26 +1102,26 @@ void llvm::ConvertDebugDeclareToDebugValue(DbgDeclareInst *DDI, if (SExtInst *SExt = dyn_cast<SExtInst>(SI->getOperand(0))) ExtendedArg = dyn_cast<Argument>(SExt->getOperand(0)); if (ExtendedArg) { - // We're now only describing a subset of the variable. The piece we're + // We're now only describing a subset of the variable. The fragment we're // describing will always be smaller than the variable size, because // VariableSize == Size of Alloca described by DDI. Since SI stores // to the alloca described by DDI, if it's first operand is an extend, // we're guaranteed that before extension, the value was narrower than // the size of the alloca, hence the size of the described variable. SmallVector<uint64_t, 3> Ops; - unsigned PieceOffset = 0; - // If this already is a bit piece, we drop the bit piece from the expression - // and record the offset. - if (DIExpr->isBitPiece()) { + unsigned FragmentOffset = 0; + // If this already is a bit fragment, we drop the bit fragment from the + // expression and record the offset. + if (DIExpr->isFragment()) { Ops.append(DIExpr->elements_begin(), DIExpr->elements_end()-3); - PieceOffset = DIExpr->getBitPieceOffset(); + FragmentOffset = DIExpr->getFragmentOffsetInBits(); } else { Ops.append(DIExpr->elements_begin(), DIExpr->elements_end()); } - Ops.push_back(dwarf::DW_OP_bit_piece); - Ops.push_back(PieceOffset); // Offset + Ops.push_back(dwarf::DW_OP_LLVM_fragment); + Ops.push_back(FragmentOffset); const DataLayout &DL = DDI->getModule()->getDataLayout(); - Ops.push_back(DL.getTypeSizeInBits(ExtendedArg->getType())); // Size + Ops.push_back(DL.getTypeSizeInBits(ExtendedArg->getType())); auto NewDIExpr = Builder.createExpression(Ops); if (!LdStHasDebugValue(DIVar, NewDIExpr, SI)) Builder.insertDbgValueIntrinsic(ExtendedArg, 0, DIVar, NewDIExpr, |
