5 files changed, 43 insertions, 14 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td
index af12ce7360b..2964fac4624 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.td
@@ -318,6 +318,17 @@ def FeatureVolcanicIslands : SubtargetFeatureGeneration<"VOLCANIC_ISLANDS",
 >;
 
 //===----------------------------------------------------------------------===//
+// Debugger related subtarget features.
+//===----------------------------------------------------------------------===//
+
+def FeatureDebuggerInsertNops : SubtargetFeature<
+  "amdgpu-debugger-insert-nops",
+  "DebuggerInsertNops",
+  "true",
+  "Insert two nop instructions for each high level source statement"
+>;
+
+//===----------------------------------------------------------------------===//
 
 def AMDGPUInstrInfo : InstrInfo {
   let guessInstructionProperties = 1;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
index 4d93bb66f9c..2861d68104e 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
@@ -97,7 +97,9 @@ AMDGPUSubtarget::AMDGPUSubtarget(const Triple &TT, StringRef GPU, StringRef FS,
       HasSMemRealTime(false), Has16BitInsts(false),
       LDSBankCount(0),
       IsaVersion(ISAVersion0_0_0),
-      EnableSIScheduler(false), FrameLowering(nullptr),
+      EnableSIScheduler(false),
+      DebuggerInsertNops(false),
+      FrameLowering(nullptr),
       GISel(),
       InstrItins(getInstrItineraryForCPU(GPU)), TargetTriple(TT) {
 
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
index 7ae0078cf5a..645559e2c83 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
@@ -95,6 +95,7 @@ private:
   int LDSBankCount;
   unsigned IsaVersion;
   bool EnableSIScheduler;
+  bool DebuggerInsertNops;
 
   std::unique_ptr<AMDGPUFrameLowering> FrameLowering;
   std::unique_ptr<AMDGPUTargetLowering> TLInfo;
@@ -304,6 +305,10 @@ public:
     return EnableSIScheduler;
   }
 
+  bool debuggerInsertNops() const {
+    return DebuggerInsertNops;
+  }
+
   bool dumpCode() const {
     return DumpCode;
   }
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index c79db482e81..85dae20b53b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -31,7 +31,6 @@
 #include "llvm/IR/Verifier.h"
 #include "llvm/MC/MCAsmInfo.h"
 #include "llvm/IR/LegacyPassManager.h"
-#include "llvm/Support/CommandLine.h"
 #include "llvm/Support/TargetRegistry.h"
 #include "llvm/Support/raw_os_ostream.h"
 #include "llvm/Transforms/IPO.h"
@@ -149,11 +148,6 @@ GCNTargetMachine::GCNTargetMachine(const Target &T, const Triple &TT,
 
 namespace {
 
-cl::opt<bool> InsertNops(
-  "amdgpu-insert-nops",
-  cl::desc("Insert two nop instructions for each high level source statement"),
-  cl::init(false));
-
 class AMDGPUPassConfig : public TargetPassConfig {
 public:
   AMDGPUPassConfig(TargetMachine *TM, PassManagerBase &PM)
@@ -397,7 +391,9 @@ void GCNPassConfig::addPreSched2() {
 void GCNPassConfig::addPreEmitPass() {
   addPass(createSIInsertWaitsPass(), false);
   addPass(createSILowerControlFlowPass(), false);
-  if (InsertNops) {
+
+  const AMDGPUSubtarget &ST = *getAMDGPUTargetMachine().getSubtargetImpl();
+  if (ST.debuggerInsertNops()) {
     addPass(createSIInsertNopsPass(), false);
   }
 }
diff --git a/llvm/lib/Target/AMDGPU/SIInsertNopsPass.cpp b/llvm/lib/Target/AMDGPU/SIInsertNopsPass.cpp
index 0e3442217b0..d81cca0a367 100644
--- a/llvm/lib/Target/AMDGPU/SIInsertNopsPass.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInsertNopsPass.cpp
@@ -8,14 +8,14 @@
 //===----------------------------------------------------------------------===//
 //
 /// \file
-/// \brief Insert two S_NOP instructions for every high level source statement.
+/// \brief Insert two nop instructions for each high level source statement.
 ///
 /// Tools, such as debugger, need to pause execution based on user input (i.e.
-/// breakpoint). In order to do this, two S_NOP instructions are inserted for
-/// each high level source statement: one before first isa instruction of high
-/// level source statement, and one after last isa instruction of high level
-/// source statement. Further, debugger may replace S_NOP instructions with
-/// S_TRAP instructions based on user input.
+/// breakpoint). In order to do this, two nop instructions are inserted for each
+/// high level source statement: one before first isa instruction of high level
+/// source statement, and one after last isa instruction of high level source
+/// statement. Further, debugger may replace nop instructions with trap
+/// instructions based on user input.
 //
 //===----------------------------------------------------------------------===//
 
@@ -24,6 +24,7 @@
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
 using namespace llvm;
 
 #define DEBUG_TYPE "si-insert-nops"
@@ -53,10 +54,21 @@ FunctionPass *llvm::createSIInsertNopsPass() {
 }
 
 bool SIInsertNops::runOnMachineFunction(MachineFunction &MF) {
+  // Skip machine functions without debug info.
+  if (!MF.getMMI().hasDebugInfo()) {
+    return false;
+  }
+
+  // Target instruction info.
   const SIInstrInfo *TII =
     static_cast<const SIInstrInfo*>(MF.getSubtarget().getInstrInfo());
 
+  // Mapping from high level source statement line number to last corresponding
+  // isa instruction.
   DenseMap<unsigned, MachineBasicBlock::iterator> LineToInst;
+  // Insert nop instruction before first isa instruction of each high level
+  // source statement and collect last isa instruction for each high level
+  // source statement.
   for (auto MBB = MF.begin(); MBB != MF.end(); ++MBB) {
     for (auto MI = MBB->begin(); MI != MBB->end(); ++MI) {
       if (MI->isDebugValue() || !MI->getDebugLoc()) {
@@ -74,6 +86,8 @@ bool SIInsertNops::runOnMachineFunction(MachineFunction &MF) {
       }
     }
   }
+  // Insert nop instruction after last isa instruction of each high level source
+  // statement.
   for (auto LineToInstEntry = LineToInst.begin();
          LineToInstEntry != LineToInst.end(); ++LineToInstEntry) {
     auto MBB = LineToInstEntry->second->getParent();
@@ -85,6 +99,7 @@ bool SIInsertNops::runOnMachineFunction(MachineFunction &MF) {
         .addImm(0);
     }
   }
+  // Insert nop instruction before prologue.
   MachineBasicBlock &MBB = MF.front();
   MachineInstr &MI = MBB.front();
   BuildMI(MBB, MI, DebugLoc(), TII->get(AMDGPU::S_NOP))