diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/SystemZ/README.txt | 7 | ||||
| -rw-r--r-- | llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp | 23 |
2 files changed, 21 insertions, 9 deletions
diff --git a/llvm/lib/Target/SystemZ/README.txt b/llvm/lib/Target/SystemZ/README.txt index f69d095b28c..7d58480e0c8 100644 --- a/llvm/lib/Target/SystemZ/README.txt +++ b/llvm/lib/Target/SystemZ/README.txt @@ -7,10 +7,9 @@ for later architectures at some point. -- -SystemZDAGToDAGISel::SelectInlineAsmMemoryOperand() is passed "m" for all -inline asm memory constraints; it doesn't get to see the original constraint. -This means that it must conservatively treat all inline asm constraints -as the most restricted type, "R". +SystemZDAGToDAGISel::SelectInlineAsmMemoryOperand() treats the Q and R +constraints the same, and the S and T constraints the same, because the optional +index is not used. -- diff --git a/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp index 0202baa60ed..be1730e800a 100644 --- a/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp +++ b/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp @@ -1322,18 +1322,17 @@ bool SystemZDAGToDAGISel:: SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) { + SDValue Base, Disp, Index; + switch(ConstraintID) { default: llvm_unreachable("Unexpected asm memory constraint"); case InlineAsm::Constraint_i: - case InlineAsm::Constraint_m: case InlineAsm::Constraint_Q: case InlineAsm::Constraint_R: - case InlineAsm::Constraint_S: - case InlineAsm::Constraint_T: // Accept addresses with short displacements, which are compatible - // with Q, R, S and T. But keep the index operand for future expansion. - SDValue Base, Disp, Index; + // with Q and R. But keep the index operand for future expansion (e.g. the + // index for R). if (selectBDXAddr(SystemZAddressingMode::FormBD, SystemZAddressingMode::Disp12Only, Op, Base, Disp, Index)) { @@ -1343,6 +1342,20 @@ SelectInlineAsmMemoryOperand(const SDValue &Op, return false; } break; + case InlineAsm::Constraint_S: + case InlineAsm::Constraint_T: + case InlineAsm::Constraint_m: + // Accept addresses with long displacements. As above, keep the index for + // future implementation of index for the T constraint. + if (selectBDXAddr(SystemZAddressingMode::FormBD, + SystemZAddressingMode::Disp20Only, + Op, Base, Disp, Index)) { + OutOps.push_back(Base); + OutOps.push_back(Disp); + OutOps.push_back(Index); + return false; + } + break; } return true; } |
