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-rw-r--r--llvm/lib/Target/Mips/Mips16InstrInfo.td6
-rw-r--r--llvm/lib/Target/Mips/MipsInstrInfo.td4
2 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/Mips/Mips16InstrInfo.td b/llvm/lib/Target/Mips/Mips16InstrInfo.td
index 52bf690a808..b91c9428858 100644
--- a/llvm/lib/Target/Mips/Mips16InstrInfo.td
+++ b/llvm/lib/Target/Mips/Mips16InstrInfo.td
@@ -369,14 +369,14 @@ class FRxRxRy16_ins<bits<5> f, string asmstr,
let rx=0 in
class FRR16_JALRC_RA_only_ins<bits<1> nd_, bits<1> l_,
string asmstr, InstrItinClass itin>:
- FRR16_JALRC<nd_, l_, 1, (outs), (ins), !strconcat(asmstr, "\t $$ra"),
+ FRR16_JALRC<nd_, l_, 1, (outs), (ins), !strconcat(asmstr, "\t$$ra"),
[], itin> ;
class FRR16_JALRC_ins<bits<1> nd, bits<1> l, bits<1> ra,
string asmstr, InstrItinClass itin>:
FRR16_JALRC<nd, l, ra, (outs), (ins CPU16Regs:$rx),
- !strconcat(asmstr, "\t $rx"), [], itin> ;
+ !strconcat(asmstr, "\t$rx"), [], itin> ;
class FRR_SF16_ins
<bits<5> _funct, bits<3> _subfunc,
@@ -1376,7 +1376,7 @@ def: Mips16Pat<(brind CPU16Regs:$rs), (JrcRx16 CPU16Regs:$rs)> {
let isCall=1, hasDelaySlot=0 in
def JumpLinkReg16:
FRR16_JALRC<0, 0, 0, (outs), (ins CPU16Regs:$rs),
- "jalrc \t$rs", [(MipsJmpLink CPU16Regs:$rs)], II_JALRC> {
+ "jalrc\t$rs", [(MipsJmpLink CPU16Regs:$rs)], II_JALRC> {
let Defs = [RA];
}
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td
index 4e6d493b91c..e16059d2adc 100644
--- a/llvm/lib/Target/Mips/MipsInstrInfo.td
+++ b/llvm/lib/Target/Mips/MipsInstrInfo.td
@@ -1724,7 +1724,7 @@ class ExtBase<string opstr, RegisterOperand RO, Operand PosOpnd,
Operand SizeOpnd, PatFrag PosImm, PatFrag SizeImm,
SDPatternOperator Op = null_frag> :
InstSE<(outs RO:$rt), (ins RO:$rs, PosOpnd:$pos, SizeOpnd:$size),
- !strconcat(opstr, " $rt, $rs, $pos, $size"),
+ !strconcat(opstr, "\t$rt, $rs, $pos, $size"),
[(set RO:$rt, (Op RO:$rs, PosImm:$pos, SizeImm:$size))], II_EXT,
FrmR, opstr>, ISA_MIPS32R2;
@@ -1732,7 +1732,7 @@ class ExtBase<string opstr, RegisterOperand RO, Operand PosOpnd,
class InsBase<string opstr, RegisterOperand RO, Operand PosOpnd,
Operand SizeOpnd, PatFrag PosImm, PatFrag SizeImm>:
InstSE<(outs RO:$rt), (ins RO:$rs, PosOpnd:$pos, SizeOpnd:$size, RO:$src),
- !strconcat(opstr, " $rt, $rs, $pos, $size"),
+ !strconcat(opstr, "\t$rt, $rs, $pos, $size"),
[(set RO:$rt, (null_frag RO:$rs, PosImm:$pos, SizeImm:$size,
RO:$src))],
II_INS, FrmR, opstr>, ISA_MIPS32R2 {
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