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-rw-r--r--llvm/lib/Target/X86/X86InstrAVX512.td17
1 files changed, 0 insertions, 17 deletions
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td
index 4d44a8f632e..a43718ab29b 100644
--- a/llvm/lib/Target/X86/X86InstrAVX512.td
+++ b/llvm/lib/Target/X86/X86InstrAVX512.td
@@ -265,23 +265,6 @@ multiclass AVX512_maskable_common<bits<8> O, Format F, X86VectorVTInfo _,
MaskingConstraint, itin, IsCommutable,
IsKCommutable>;
-// Similar to AVX512_maskable_common, but with scalar types.
-multiclass AVX512_maskable_fp_common<bits<8> O, Format F, X86VectorVTInfo _,
- dag Outs,
- dag Ins, dag MaskingIns, dag ZeroMaskingIns,
- string OpcodeStr,
- string AttSrcAsm, string IntelSrcAsm,
- SDNode Select = vselect,
- string MaskingConstraint = "",
- InstrItinClass itin = NoItinerary,
- bit IsCommutable = 0,
- bit IsKCommutable = 0> :
- AVX512_maskable_custom<O, F, Outs, Ins, MaskingIns, ZeroMaskingIns, OpcodeStr,
- AttSrcAsm, IntelSrcAsm,
- [], [], [],
- MaskingConstraint, itin, IsCommutable,
- IsKCommutable>;
-
// This multiclass generates the unconditional/non-masking, the masking and
// the zero-masking variant of the vector instruction. In the masking case, the
// perserved vector elements come from a new dummy input operand tied to $dst.
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