diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/RegAllocGreedy.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonInstrInfoV4.td | 6 | ||||
| -rw-r--r-- | llvm/lib/Transforms/Scalar/ConstantHoisting.cpp | 2 |
3 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp b/llvm/lib/CodeGen/RegAllocGreedy.cpp index 3c3f622759f..21e23df1073 100644 --- a/llvm/lib/CodeGen/RegAllocGreedy.cpp +++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp @@ -1916,7 +1916,7 @@ RAGreedy::mayRecolorAllInterferences(unsigned PhysReg, LiveInterval &VirtReg, /// R3 is available. /// Recoloring => vC = R1, vA = R2, vB = R3 /// -/// \p Order defines the prefered allocation order for \p VirtReg. +/// \p Order defines the preferred allocation order for \p VirtReg. /// \p NewRegs will contain any new virtual register that have been created /// (split, spill) during the process and that must be assigned. /// \p FixedRegisters contains all the virtual registers that cannot be diff --git a/llvm/lib/Target/Hexagon/HexagonInstrInfoV4.td b/llvm/lib/Target/Hexagon/HexagonInstrInfoV4.td index d2600dffb08..a95fb80e5f9 100644 --- a/llvm/lib/Target/Hexagon/HexagonInstrInfoV4.td +++ b/llvm/lib/Target/Hexagon/HexagonInstrInfoV4.td @@ -3198,7 +3198,7 @@ def : Pat<(i64 (cttz (i64 DoubleRegs:$src1))), // i8 -> i64 loads -// We need a complexity of 120 here to overide preceeding handling of +// We need a complexity of 120 here to override preceding handling of // zextloadi8. let Predicates = [HasV4T], AddedComplexity = 120 in { def: Pat <(i64 (extloadi8 (NumUsesBelowThresCONST32 tglobaladdr:$addr))), @@ -3220,7 +3220,7 @@ def: Pat <(i64 (sextloadi8 FoldGlobalAddr:$addr)), (i64 (SXTW (LDrib_abs_V4 FoldGlobalAddr:$addr)))>; } // i16 -> i64 loads -// We need a complexity of 120 here to overide preceeding handling of +// We need a complexity of 120 here to override preceding handling of // zextloadi16. let AddedComplexity = 120 in { def: Pat <(i64 (extloadi16 (NumUsesBelowThresCONST32 tglobaladdr:$addr))), @@ -3248,7 +3248,7 @@ def: Pat <(i64 (sextloadi16 FoldGlobalAddr:$addr)), Requires<[HasV4T]>; } // i32->i64 loads -// We need a complexity of 120 here to overide preceeding handling of +// We need a complexity of 120 here to override preceding handling of // zextloadi32. let AddedComplexity = 120 in { def: Pat <(i64 (extloadi32 (NumUsesBelowThresCONST32 tglobaladdr:$addr))), diff --git a/llvm/lib/Transforms/Scalar/ConstantHoisting.cpp b/llvm/lib/Transforms/Scalar/ConstantHoisting.cpp index 0fca617be7e..6250620c0f1 100644 --- a/llvm/lib/Transforms/Scalar/ConstantHoisting.cpp +++ b/llvm/lib/Transforms/Scalar/ConstantHoisting.cpp @@ -454,7 +454,7 @@ bool ConstantHoisting::OptimizeConstants(Function &F) { // base constant. FindBaseConstants(); - // Finaly hoist the base constant and emit materializating code for dependent + // Finally hoist the base constant and emit materializating code for dependent // constants. MadeChange |= EmitBaseConstants(F); |

