diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 8 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp | 13 |
2 files changed, 18 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp index ac7d656efb6..0d1908ada7f 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -708,8 +708,12 @@ unsigned ARMBaseInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const { return MCID.getSize(); // If this machine instr is an inline asm, measure it. - if (MI.getOpcode() == ARM::INLINEASM) - return getInlineAsmLength(MI.getOperand(0).getSymbolName(), *MAI); + if (MI.getOpcode() == ARM::INLINEASM) { + unsigned Size = getInlineAsmLength(MI.getOperand(0).getSymbolName(), *MAI); + if (!MF->getInfo<ARMFunctionInfo>()->isThumbFunction()) + Size = alignTo(Size, 4); + return Size; + } unsigned Opc = MI.getOpcode(); switch (Opc) { default: diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp index 0cef683778e..3ee63ac374b 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp @@ -31,6 +31,9 @@ ARMMCAsmInfoDarwin::ARMMCAsmInfoDarwin(const Triple &TheTriple) { SupportsDebugInformation = true; + // Conditional Thumb 4-byte instructions can have an implicit IT. + MaxInstLength = 6; + // Exceptions handling ExceptionsType = (TheTriple.isOSDarwin() && !TheTriple.isWatchABI()) ? ExceptionHandling::SjLj @@ -56,6 +59,9 @@ ARMELFMCAsmInfo::ARMELFMCAsmInfo(const Triple &TheTriple) { SupportsDebugInformation = true; + // Conditional Thumb 4-byte instructions can have an implicit IT. + MaxInstLength = 6; + // Exceptions handling switch (TheTriple.getOS()) { case Triple::NetBSD: @@ -90,6 +96,9 @@ ARMCOFFMCAsmInfoMicrosoft::ARMCOFFMCAsmInfoMicrosoft() { PrivateGlobalPrefix = "$M"; PrivateLabelPrefix = "$M"; CommentString = ";"; + + // Conditional Thumb 4-byte instructions can have an implicit IT. + MaxInstLength = 6; } void ARMCOFFMCAsmInfoGNU::anchor() { } @@ -110,5 +119,7 @@ ARMCOFFMCAsmInfoGNU::ARMCOFFMCAsmInfoGNU() { UseIntegratedAssembler = true; DwarfRegNumForCFI = false; -} + // Conditional Thumb 4-byte instructions can have an implicit IT. + MaxInstLength = 6; +} |
