diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARM.td | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td index f08afa8a7f0..276ea789328 100644 --- a/llvm/lib/Target/ARM/ARM.td +++ b/llvm/lib/Target/ARM/ARM.td @@ -1030,6 +1030,7 @@ def : ProcessorModel<"cyclone", SwiftModel, [ARMv8a, ProcSwift, def : ProcNoItin<"exynos-m1", [ARMv8a, ProcExynosM1, FeatureZCZeroing, FeatureUseWideStrideVFP, + FeatureUseAA, FeatureSplatVFPToNeon, FeatureSlowVGETLNi32, FeatureSlowVDUP32, @@ -1046,6 +1047,7 @@ def : ProcNoItin<"exynos-m1", [ARMv8a, ProcExynosM1, def : ProcNoItin<"exynos-m2", [ARMv8a, ProcExynosM1, FeatureZCZeroing, FeatureUseWideStrideVFP, + FeatureUseAA, FeatureSplatVFPToNeon, FeatureSlowVGETLNi32, FeatureSlowVDUP32, @@ -1062,6 +1064,7 @@ def : ProcNoItin<"exynos-m2", [ARMv8a, ProcExynosM1, def : ProcNoItin<"exynos-m3", [ARMv8a, ProcExynosM1, FeatureZCZeroing, FeatureUseWideStrideVFP, + FeatureUseAA, FeatureSplatVFPToNeon, FeatureSlowVGETLNi32, FeatureSlowVDUP32, @@ -1078,6 +1081,7 @@ def : ProcNoItin<"exynos-m3", [ARMv8a, ProcExynosM1, def : ProcNoItin<"exynos-m4", [ARMv8a, ProcExynosM1, FeatureZCZeroing, FeatureUseWideStrideVFP, + FeatureUseAA, FeatureSplatVFPToNeon, FeatureSlowVGETLNi32, FeatureSlowVDUP32, |
