diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp | 10 | ||||
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64MachineLegalizer.cpp | 2 |
2 files changed, 9 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp b/llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp index 31092a52a83..01d87d1e70d 100644 --- a/llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp +++ b/llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp @@ -100,7 +100,12 @@ MachineLegalizeHelper::widenScalar(MachineInstr &MI, LLT WideTy) { switch (MI.getOpcode()) { default: return UnableToLegalize; - case TargetOpcode::G_ADD: { + case TargetOpcode::G_ADD: + case TargetOpcode::G_AND: + case TargetOpcode::G_MUL: + case TargetOpcode::G_OR: + case TargetOpcode::G_XOR: + case TargetOpcode::G_SUB: { // Perform operation at larger width (any extension is fine here, high bits // don't affect the result) and then truncate the result back to the // original type. @@ -114,7 +119,8 @@ MachineLegalizeHelper::widenScalar(MachineInstr &MI, LLT WideTy) { MIRBuilder.buildAnyExtend(WideTy, Src2Ext, MI.getOperand(2).getReg()); unsigned DstExt = MRI.createGenericVirtualRegister(WideSize); - MIRBuilder.buildAdd(WideTy, DstExt, Src1Ext, Src2Ext); + MIRBuilder.buildInstr(MI.getOpcode(), WideTy) + .addDef(DstExt).addUse(Src1Ext).addUse(Src2Ext); MIRBuilder.buildTrunc(MI.getType(), MI.getOperand(0).getReg(), DstExt); MI.eraseFromParent(); diff --git a/llvm/lib/Target/AArch64/AArch64MachineLegalizer.cpp b/llvm/lib/Target/AArch64/AArch64MachineLegalizer.cpp index c547f7b60d6..02be3bfab9c 100644 --- a/llvm/lib/Target/AArch64/AArch64MachineLegalizer.cpp +++ b/llvm/lib/Target/AArch64/AArch64MachineLegalizer.cpp @@ -34,7 +34,7 @@ AArch64MachineLegalizer::AArch64MachineLegalizer() { const LLT v4s32 = LLT::vector(4, 32); const LLT v2s64 = LLT::vector(2, 64); - for (auto BinOp : {G_ADD, G_SUB, G_AND, G_OR, G_XOR}) { + for (auto BinOp : {G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR}) { for (auto Ty : {s32, s64, v2s32, v4s32, v2s64}) setAction(BinOp, Ty, Legal); |
