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-rw-r--r--llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp27
-rw-r--r--llvm/lib/Target/AArch64/AArch64ISelLowering.cpp24
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp24
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp24
4 files changed, 36 insertions, 63 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 97cf3c5d15b..e58a6343c69 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -15,9 +15,11 @@
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/CodeGen/Analysis.h"
+#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/DerivedTypes.h"
@@ -65,6 +67,31 @@ bool TargetLowering::isInTailCallPosition(SelectionDAG &DAG, SDNode *Node,
return isUsedByReturnOnly(Node, Chain);
}
+bool TargetLowering::parametersInCSRMatch(const MachineRegisterInfo &MRI,
+ const uint32_t *CallerPreservedMask,
+ const SmallVectorImpl<CCValAssign> &ArgLocs,
+ const SmallVectorImpl<SDValue> &OutVals) const {
+ for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) {
+ const CCValAssign &ArgLoc = ArgLocs[I];
+ if (!ArgLoc.isRegLoc())
+ continue;
+ unsigned Reg = ArgLoc.getLocReg();
+ // Only look at callee saved registers.
+ if (MachineOperand::clobbersPhysReg(CallerPreservedMask, Reg))
+ continue;
+ // Check that we pass the value used for the caller.
+ // (We look for a CopyFromReg reading a virtual register that is used
+ // for the function live-in value of register Reg)
+ SDValue Value = OutVals[I];
+ if (Value->getOpcode() != ISD::CopyFromReg)
+ return false;
+ unsigned ArgReg = cast<RegisterSDNode>(Value->getOperand(1))->getReg();
+ if (MRI.getLiveInPhysReg(ArgReg) != Reg)
+ return false;
+ }
+ return true;
+}
+
/// \brief Set CallLoweringInfo attribute flags based on a call instruction
/// and called function attributes.
void TargetLowering::ArgListEntry::setAttributes(ImmutableCallSite *CS,
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 7cd8ca99e61..4d7f774f84d 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -2899,27 +2899,9 @@ bool AArch64TargetLowering::isEligibleForTailCallOptimization(
if (CCInfo.getNextStackOffset() > FuncInfo->getBytesInStackArgArea())
return false;
- // Parameters passed in callee saved registers must have the same value in
- // caller and callee.
- for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) {
- const CCValAssign &ArgLoc = ArgLocs[I];
- if (!ArgLoc.isRegLoc())
- continue;
- unsigned Reg = ArgLoc.getLocReg();
- // Only look at callee saved registers.
- if (MachineOperand::clobbersPhysReg(CallerPreserved, Reg))
- continue;
- // Check that we pass the value used for the caller.
- // (We look for a CopyFromReg reading a virtual register that is used
- // for the function live-in value of register Reg)
- SDValue Value = OutVals[I];
- if (Value->getOpcode() != ISD::CopyFromReg)
- return false;
- unsigned ArgReg = cast<RegisterSDNode>(Value->getOperand(1))->getReg();
- const MachineRegisterInfo &MRI = MF.getRegInfo();
- if (MRI.getLiveInPhysReg(ArgReg) != Reg)
- return false;
- }
+ const MachineRegisterInfo &MRI = MF.getRegInfo();
+ if (!parametersInCSRMatch(MRI, CallerPreserved, ArgLocs, OutVals))
+ return false;
return true;
}
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 217e2550d9a..95354740185 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -2208,27 +2208,9 @@ ARMTargetLowering::IsEligibleForTailCallOptimization(SDValue Callee,
}
}
- // Parameters passed in callee saved registers must have the same value in
- // caller and callee.
- for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) {
- const CCValAssign &ArgLoc = ArgLocs[I];
- if (!ArgLoc.isRegLoc())
- continue;
- unsigned Reg = ArgLoc.getLocReg();
- // Only look at callee saved registers.
- if (MachineOperand::clobbersPhysReg(CallerPreserved, Reg))
- continue;
- // Check that we pass the value used for the caller.
- // (We look for a CopyFromReg reading a virtual register that is used
- // for the function live-in value of register Reg)
- SDValue Value = OutVals[I];
- if (Value->getOpcode() != ISD::CopyFromReg)
- return false;
- unsigned ArgReg = cast<RegisterSDNode>(Value->getOperand(1))->getReg();
- const MachineRegisterInfo &MRI = MF.getRegInfo();
- if (MRI.getLiveInPhysReg(ArgReg) != Reg)
- return false;
- }
+ const MachineRegisterInfo &MRI = MF.getRegInfo();
+ if (!parametersInCSRMatch(MRI, CallerPreserved, ArgLocs, OutVals))
+ return false;
}
return true;
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 7cf909f1039..fcd7f0777f9 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -3849,27 +3849,9 @@ bool X86TargetLowering::IsEligibleForTailCallOptimization(
}
}
- // Parameters passed in callee saved registers must have the same value in
- // caller and callee.
- for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) {
- const CCValAssign &ArgLoc = ArgLocs[I];
- if (!ArgLoc.isRegLoc())
- continue;
- unsigned Reg = ArgLoc.getLocReg();
- // Only look at callee saved registers.
- if (MachineOperand::clobbersPhysReg(CallerPreserved, Reg))
- continue;
- // Check that we pass the value used for the caller.
- // (We look for a CopyFromReg reading a virtual register that is used
- // for the function live-in value of register Reg)
- SDValue Value = OutVals[I];
- if (Value->getOpcode() != ISD::CopyFromReg)
- return false;
- unsigned ArgReg = cast<RegisterSDNode>(Value->getOperand(1))->getReg();
- const MachineRegisterInfo &MRI = MF.getRegInfo();
- if (MRI.getLiveInPhysReg(ArgReg) != Reg)
- return false;
- }
+ const MachineRegisterInfo &MRI = MF.getRegInfo();
+ if (!parametersInCSRMatch(MRI, CallerPreserved, ArgLocs, OutVals))
+ return false;
}
bool CalleeWillPop =
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