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-rw-r--r--llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp5
-rw-r--r--llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp1
-rw-r--r--llvm/lib/Support/Signals.cpp9
-rw-r--r--llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp2
-rw-r--r--llvm/lib/Target/Sparc/SparcInstrInfo.cpp2
-rw-r--r--llvm/lib/Target/Sparc/SparcInternals.h8
-rw-r--r--llvm/lib/Target/Sparc/SparcRegClassInfo.cpp1
-rw-r--r--llvm/lib/Target/Sparc/SparcRegInfo.cpp1
-rw-r--r--llvm/lib/Transforms/LevelRaise.cpp1
9 files changed, 18 insertions, 12 deletions
diff --git a/llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp b/llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp
index b27f9022bba..c43f8ddf84e 100644
--- a/llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp
+++ b/llvm/lib/CodeGen/InstrSelection/InstrSelection.cpp
@@ -27,6 +27,7 @@
#include "Support/CommandLine.h"
#include <iostream>
using std::cerr;
+using std::vector;
//******************** Internal Data Declarations ************************/
@@ -152,7 +153,7 @@ SelectInstructionsForMethod(Function *F, TargetMachine &target)
//-------------------------------------------------------------------------
void
-InsertPhiElimInstructions(BasicBlock *BB, const vector<MachineInstr*>& CpVec)
+InsertPhiElimInstructions(BasicBlock *BB, const std::vector<MachineInstr*>& CpVec)
{
Instruction *TermInst = (Instruction*)BB->getTerminator();
MachineCodeForInstruction &MC4Term =MachineCodeForInstruction::get(TermInst);
@@ -294,7 +295,7 @@ SelectInstructionsForTree(InstrTreeNode* treeRoot, int goalnt,
//
if (treeRoot->opLabel != VRegListOp)
{
- vector<MachineInstr*> minstrVec;
+ std::vector<MachineInstr*> minstrVec;
InstructionNode* instrNode = (InstructionNode*)treeRoot;
assert(instrNode->getNodeType() == InstrTreeNode::NTInstructionNode);
diff --git a/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp b/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
index c7c9756ce77..e884463ae29 100644
--- a/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
+++ b/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
@@ -28,6 +28,7 @@
#include <iostream>
#include <math.h>
using std::cerr;
+using std::vector;
RegAllocDebugLevel_t DEBUG_RA;
static cl::Enum<RegAllocDebugLevel_t> DEBUG_RA_c(DEBUG_RA, "dregalloc",
diff --git a/llvm/lib/Support/Signals.cpp b/llvm/lib/Support/Signals.cpp
index 8aa1b6047ab..29daedf0fb9 100644
--- a/llvm/lib/Support/Signals.cpp
+++ b/llvm/lib/Support/Signals.cpp
@@ -11,8 +11,9 @@
#include <cstdlib>
#include <cstdio>
#include <signal.h>
+using std::string;
-static vector<string> FilesToRemove;
+static std::vector<string> FilesToRemove;
// IntSigs - Signals that may interrupt the program at any time.
static const int IntSigs[] = {
@@ -36,7 +37,7 @@ static void SignalHandler(int Sig) {
FilesToRemove.pop_back();
}
- if (find(IntSigs, IntSigsEnd, Sig) != IntSigsEnd)
+ if (std::find(IntSigs, IntSigsEnd, Sig) != IntSigsEnd)
exit(1); // If this is an interrupt signal, exit the program
// Otherwise if it is a fault (like SEGV) reissue the signal to die...
@@ -48,6 +49,6 @@ static void RegisterHandler(int Signal) { signal(Signal, SignalHandler); }
void RemoveFileOnSignal(const string &Filename) {
FilesToRemove.push_back(Filename);
- for_each(IntSigs, IntSigsEnd, RegisterHandler);
- for_each(KillSigs, KillSigsEnd, RegisterHandler);
+ std::for_each(IntSigs, IntSigsEnd, RegisterHandler);
+ std::for_each(KillSigs, KillSigsEnd, RegisterHandler);
}
diff --git a/llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp b/llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp
index 72431499fb5..79f68715054 100644
--- a/llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp
+++ b/llvm/lib/Target/Sparc/PrologEpilogCodeInserter.cpp
@@ -52,7 +52,7 @@ namespace {
void InsertPrologEpilogCode::InsertPrologCode(Function &F)
{
- vector<MachineInstr*> mvec;
+ std::vector<MachineInstr*> mvec;
MachineInstr* M;
const MachineFrameInfo& frameInfo = Target.getFrameInfo();
diff --git a/llvm/lib/Target/Sparc/SparcInstrInfo.cpp b/llvm/lib/Target/Sparc/SparcInstrInfo.cpp
index 5fbced0f9f1..7bd8dd2437a 100644
--- a/llvm/lib/Target/Sparc/SparcInstrInfo.cpp
+++ b/llvm/lib/Target/Sparc/SparcInstrInfo.cpp
@@ -22,7 +22,7 @@
#include "llvm/Instruction.h"
#include "llvm/Constants.h"
#include "llvm/DerivedTypes.h"
-
+using std::vector;
//************************ Internal Functions ******************************/
diff --git a/llvm/lib/Target/Sparc/SparcInternals.h b/llvm/lib/Target/Sparc/SparcInternals.h
index b85b58f39be..b1a7ec3f73a 100644
--- a/llvm/lib/Target/Sparc/SparcInternals.h
+++ b/llvm/lib/Target/Sparc/SparcInternals.h
@@ -455,16 +455,16 @@ public:
// for an architecture.
//
void cpReg2RegMI(unsigned SrcReg, unsigned DestReg,
- int RegType, vector<MachineInstr*>& mvec) const;
+ int RegType, std::vector<MachineInstr*>& mvec) const;
void cpReg2MemMI(unsigned SrcReg, unsigned DestPtrReg,
- int Offset, int RegType, vector<MachineInstr*>& mvec) const;
+ int Offset, int RegType, std::vector<MachineInstr*>& mvec) const;
void cpMem2RegMI(unsigned SrcPtrReg, int Offset, unsigned DestReg,
- int RegType, vector<MachineInstr*>& mvec) const;
+ int RegType, std::vector<MachineInstr*>& mvec) const;
void cpValue2Value(Value *Src, Value *Dest,
- vector<MachineInstr*>& mvec) const;
+ std::vector<MachineInstr*>& mvec) const;
// To see whether a register is a volatile (i.e., whehter it must be
// preserved acorss calls)
diff --git a/llvm/lib/Target/Sparc/SparcRegClassInfo.cpp b/llvm/lib/Target/Sparc/SparcRegClassInfo.cpp
index da40826b3e0..08e33245ba3 100644
--- a/llvm/lib/Target/Sparc/SparcRegClassInfo.cpp
+++ b/llvm/lib/Target/Sparc/SparcRegClassInfo.cpp
@@ -4,6 +4,7 @@
#include "llvm/Type.h"
#include <iostream>
using std::cerr;
+using std::vector;
//-----------------------------------------------------------------------------
// Int Register Class - method for coloring a node in the interference graph.
diff --git a/llvm/lib/Target/Sparc/SparcRegInfo.cpp b/llvm/lib/Target/Sparc/SparcRegInfo.cpp
index 6aa4d816264..96ff5ad0f52 100644
--- a/llvm/lib/Target/Sparc/SparcRegInfo.cpp
+++ b/llvm/lib/Target/Sparc/SparcRegInfo.cpp
@@ -22,6 +22,7 @@
#include <iostream>
#include <values.h>
using std::cerr;
+using std::vector;
UltraSparcRegInfo::UltraSparcRegInfo(const UltraSparc &tgt)
: MachineRegInfo(tgt), UltraSparcInfo(&tgt), NumOfIntArgRegs(6),
diff --git a/llvm/lib/Transforms/LevelRaise.cpp b/llvm/lib/Transforms/LevelRaise.cpp
index c3100347680..afc2ad5d7a6 100644
--- a/llvm/lib/Transforms/LevelRaise.cpp
+++ b/llvm/lib/Transforms/LevelRaise.cpp
@@ -18,6 +18,7 @@
#include "Support/STLExtras.h"
#include "Support/StatisticReporter.h"
#include <algorithm>
+using std::cerr;
static Statistic<> NumLoadStorePeepholes("raise\t\t- Number of load/store peepholes");
static Statistic<> NumGEPInstFormed("raise\t\t- Number of other getelementptr's formed");
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