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-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp15
1 files changed, 7 insertions, 8 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index de6e721c76c..ffbcd4537ec 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -23765,14 +23765,13 @@ static SDValue LowerVectorCTPOP(SDValue Op, const X86Subtarget &Subtarget,
// TRUNC(CTPOP(ZEXT(X))) to make use of vXi32/vXi64 VPOPCNT instructions.
if (Subtarget.hasVPOPCNTDQ()) {
- if (VT == MVT::v8i16) {
- Op = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::v8i64, Op0);
- Op = DAG.getNode(ISD::CTPOP, DL, MVT::v8i64, Op);
- return DAG.getNode(ISD::TRUNCATE, DL, VT, Op);
- }
- if (VT == MVT::v16i8 || VT == MVT::v16i16) {
- Op = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::v16i32, Op0);
- Op = DAG.getNode(ISD::CTPOP, DL, MVT::v16i32, Op);
+ unsigned NumElems = VT.getVectorNumElements();
+ assert((VT.getVectorElementType() == MVT::i8 ||
+ VT.getVectorElementType() == MVT::i16) && "Unexpected type");
+ if (NumElems <= 16) {
+ MVT NewVT = MVT::getVectorVT(MVT::i32, NumElems);
+ Op = DAG.getNode(ISD::ZERO_EXTEND, DL, NewVT, Op0);
+ Op = DAG.getNode(ISD::CTPOP, DL, NewVT, Op);
return DAG.getNode(ISD::TRUNCATE, DL, VT, Op);
}
}
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