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-rw-r--r--llvm/lib/Target/PowerPC/PPCISelLowering.cpp14
-rw-r--r--llvm/lib/Target/PowerPC/PPCISelLowering.h1
2 files changed, 15 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 83ed349b46f..bea8792a039 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -13978,3 +13978,17 @@ bool PPCTargetLowering::mayBeEmittedAsTailCall(const CallInst *CI) const {
// If the function is local then we have a good chance at tail-calling it
return getTargetMachine().shouldAssumeDSOLocal(*Caller->getParent(), Callee);
}
+
+bool PPCTargetLowering::
+isMaskAndCmp0FoldingBeneficial(const Instruction &AndI) const {
+ const Value *Mask = AndI.getOperand(1);
+ // If the mask is suitable for andi. or andis. we should sink the and.
+ if (const ConstantInt *CI = dyn_cast<ConstantInt>(Mask)) {
+ int64_t ConstVal = CI->getZExtValue();
+ return isUInt<16>(ConstVal) ||
+ (isUInt<16>(ConstVal >> 16) && !(ConstVal & 0xFFFF));
+ }
+
+ // For non-constant masks, we can always use the record-form and.
+ return true;
+}
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.h b/llvm/lib/Target/PowerPC/PPCISelLowering.h
index b4373c1dfea..f9d4c20bb2f 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.h
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.h
@@ -1101,6 +1101,7 @@ namespace llvm {
// tail call. This will cause the optimizers to attempt to move, or
// duplicate return instructions to help enable tail call optimizations.
bool mayBeEmittedAsTailCall(const CallInst *CI) const override;
+ bool isMaskAndCmp0FoldingBeneficial(const Instruction &AndI) const override;
}; // end class PPCTargetLowering
namespace PPC {
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