diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/R600/R600OptimizeVectorRegisters.cpp | 22 |
1 files changed, 15 insertions, 7 deletions
diff --git a/llvm/lib/Target/R600/R600OptimizeVectorRegisters.cpp b/llvm/lib/Target/R600/R600OptimizeVectorRegisters.cpp index 7c4aee76dda..b122baef124 100644 --- a/llvm/lib/Target/R600/R600OptimizeVectorRegisters.cpp +++ b/llvm/lib/Target/R600/R600OptimizeVectorRegisters.cpp @@ -159,6 +159,19 @@ bool R600VectorRegMerger::tryMergeVector(const RegSeqInfo *Untouched, return true; } +static +unsigned getReassignedChan( + const std::vector<std::pair<unsigned, unsigned> > &RemapChan, + unsigned Chan) { + for (unsigned j = 0, je = RemapChan.size(); j < je; j++) { + if (RemapChan[j].first == Chan) { + return RemapChan[j].second; + break; + } + } + llvm_unreachable("Chan wasn't reassigned"); +} + MachineInstr *R600VectorRegMerger::RebuildVector( RegSeqInfo *RSI, const RegSeqInfo *BaseRSI, const std::vector<std::pair<unsigned, unsigned> > &RemapChan) const { @@ -179,13 +192,8 @@ MachineInstr *R600VectorRegMerger::RebuildVector( unsigned DstReg = MRI->createVirtualRegister(&AMDGPU::R600_Reg128RegClass); unsigned SubReg = (*It).first; unsigned Swizzle = (*It).second; - unsigned Chan = 0xDEADBEEF; - for (unsigned j = 0, je = RemapChan.size(); j < je; j++) { - if (RemapChan[j].first == Swizzle) { - Chan = RemapChan[j].second; - break; - } - } + unsigned Chan = getReassignedChan(RemapChan, Swizzle); + MachineInstr *Tmp = BuildMI(MBB, Pos, DL, TII->get(AMDGPU::INSERT_SUBREG), DstReg) .addReg(SrcVec) |
