diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/DFAPacketizer.cpp | 65 | ||||
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp | 11 | 
2 files changed, 65 insertions, 11 deletions
| diff --git a/llvm/lib/CodeGen/DFAPacketizer.cpp b/llvm/lib/CodeGen/DFAPacketizer.cpp index b99be5d7a87..edf5186124e 100644 --- a/llvm/lib/CodeGen/DFAPacketizer.cpp +++ b/llvm/lib/CodeGen/DFAPacketizer.cpp @@ -23,6 +23,7 @@  //===----------------------------------------------------------------------===//  #include "llvm/CodeGen/DFAPacketizer.h" +#include "llvm/ADT/StringExtras.h"  #include "llvm/CodeGen/MachineFunction.h"  #include "llvm/CodeGen/MachineInstr.h"  #include "llvm/CodeGen/MachineInstrBundle.h" @@ -72,9 +73,11 @@ static DFAInput getDFAInsnInput(const std::vector<unsigned> &InsnClass) {  // --------------------------------------------------------------------  DFAPacketizer::DFAPacketizer(const InstrItineraryData *I, -                             const DFAStateInput (*SIT)[2], -                             const unsigned *SET): -  InstrItins(I), DFAStateInputTable(SIT), DFAStateEntryTable(SET) { +                             const DFAStateInput (*SIT)[2], const unsigned *SET, +                             const std::pair<unsigned, unsigned> *RTT, +                             const unsigned *RTET) +    : InstrItins(I), DFAStateInputTable(SIT), DFAStateEntryTable(SET), +      DFAResourceTransitionTable(RTT), DFAResourceTransitionEntryTable(RTET) {    // Make sure DFA types are large enough for the number of terms & resources.    static_assert((DFA_MAX_RESTERMS * DFA_MAX_RESOURCES) <=                      (8 * sizeof(DFAInput)), @@ -82,6 +85,7 @@ DFAPacketizer::DFAPacketizer(const InstrItineraryData *I,    static_assert(        (DFA_MAX_RESTERMS * DFA_MAX_RESOURCES) <= (8 * sizeof(DFAStateInput)),        "(DFA_MAX_RESTERMS * DFA_MAX_RESOURCES) too big for DFAStateInput"); +  clearResources();  }  // Read the DFA transition table and update CachedTable. @@ -93,16 +97,26 @@ DFAPacketizer::DFAPacketizer(const InstrItineraryData *I,  //                         for the ith state  //  void DFAPacketizer::ReadTable(unsigned int state) { -  unsigned ThisState = DFAStateEntryTable[state]; -  unsigned NextStateInTable = DFAStateEntryTable[state+1]; +  unsigned ThisStateIdx = DFAStateEntryTable[state]; +  unsigned NextStateIdxInTable = DFAStateEntryTable[state + 1];    // Early exit in case CachedTable has already contains this    // state's transitions. -  if (CachedTable.count(UnsignPair(state, DFAStateInputTable[ThisState][0]))) +  if (CachedTable.count(UnsignPair(state, DFAStateInputTable[ThisStateIdx][0])))      return; -  for (unsigned i = ThisState; i < NextStateInTable; i++) -    CachedTable[UnsignPair(state, DFAStateInputTable[i][0])] = -      DFAStateInputTable[i][1]; +  for (unsigned TransitionIdx = ThisStateIdx; +       TransitionIdx < NextStateIdxInTable; TransitionIdx++) { +    auto TransitionPair = +        UnsignPair(state, DFAStateInputTable[TransitionIdx][0]); +    CachedTable[TransitionPair] = DFAStateInputTable[TransitionIdx][1]; + +    if (TrackResources) { +      unsigned I = DFAResourceTransitionEntryTable[TransitionIdx]; +      unsigned E = DFAResourceTransitionEntryTable[TransitionIdx + 1]; +      CachedResourceTransitions[TransitionPair] = makeArrayRef( +          &DFAResourceTransitionTable[I], &DFAResourceTransitionTable[E]); +    } +  }  }  // Return the DFAInput for an instruction class. @@ -141,6 +155,16 @@ void DFAPacketizer::reserveResources(const MCInstrDesc *MID) {    DFAInput InsnInput = getInsnInput(InsnClass);    UnsignPair StateTrans = UnsignPair(CurrentState, InsnInput);    ReadTable(CurrentState); + +  if (TrackResources) { +    DenseMap<unsigned, SmallVector<unsigned, 8>> NewResourceStates; +    for (const auto &KV : CachedResourceTransitions[StateTrans]) { +      assert(ResourceStates.count(KV.first)); +      NewResourceStates[KV.second] = ResourceStates[KV.first]; +      NewResourceStates[KV.second].push_back(KV.second); +    } +    ResourceStates = NewResourceStates; +  }    assert(CachedTable.count(StateTrans) != 0);    CurrentState = CachedTable[StateTrans];  } @@ -159,6 +183,21 @@ void DFAPacketizer::reserveResources(MachineInstr &MI) {    reserveResources(&MID);  } +unsigned DFAPacketizer::getUsedResources(unsigned InstIdx) { +  assert(TrackResources && "getUsedResources requires resource tracking!"); +  // Assert that there is at least one example of a valid bundle format. +  assert(!ResourceStates.empty() && "Invalid bundle!"); +  SmallVectorImpl<unsigned> &RS = ResourceStates.begin()->second; + +  // RS stores the cumulative resources used up to and including the I'th +  // instruction. The 0th instruction is the base case. +  if (InstIdx == 0) +    return RS[0]; +  // Return the difference between the cumulative resources used by InstIdx and +  // its predecessor. +  return RS[InstIdx] ^ RS[InstIdx - 1]; +} +  namespace llvm {  // This class extends ScheduleDAGInstrs and overrides the schedule method @@ -210,6 +249,7 @@ VLIWPacketizerList::VLIWPacketizerList(MachineFunction &mf,                                         MachineLoopInfo &mli, AliasAnalysis *aa)      : MF(mf), TII(mf.getSubtarget().getInstrInfo()), AA(aa) {    ResourceTracker = TII->CreateTargetScheduleState(MF.getSubtarget()); +  ResourceTracker->setTrackResources(true);    VLIWScheduler = new DefaultVLIWScheduler(MF, mli, AA);  } @@ -224,8 +264,11 @@ void VLIWPacketizerList::endPacket(MachineBasicBlock *MBB,    LLVM_DEBUG({      if (!CurrentPacketMIs.empty()) {        dbgs() << "Finalizing packet:\n"; -      for (MachineInstr *MI : CurrentPacketMIs) -        dbgs() << " * " << *MI; +      unsigned Idx = 0; +      for (MachineInstr *MI : CurrentPacketMIs) { +        unsigned R = ResourceTracker->getUsedResources(Idx++); +        dbgs() << " * [res:0x" << utohexstr(R) << "] " << *MI; +      }      }    });    if (CurrentPacketMIs.size() > 1) { diff --git a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp index c89c0b3369f..7024dafd479 100644 --- a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp +++ b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp @@ -24,6 +24,7 @@  #include "llvm/ADT/BitVector.h"  #include "llvm/ADT/DenseSet.h"  #include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/StringExtras.h"  #include "llvm/Analysis/AliasAnalysis.h"  #include "llvm/CodeGen/MachineBasicBlock.h"  #include "llvm/CodeGen/MachineBranchProbabilityInfo.h" @@ -1763,6 +1764,16 @@ HexagonPacketizerList::addToPacket(MachineInstr &MI) {  void HexagonPacketizerList::endPacket(MachineBasicBlock *MBB,                                        MachineBasicBlock::iterator EndMI) {    // Replace VLIWPacketizerList::endPacket(MBB, EndMI). +  LLVM_DEBUG({ +    if (!CurrentPacketMIs.empty()) { +      dbgs() << "Finalizing packet:\n"; +      unsigned Idx = 0; +      for (MachineInstr *MI : CurrentPacketMIs) { +        unsigned R = ResourceTracker->getUsedResources(Idx++); +        dbgs() << " * [res:0x" << utohexstr(R) << "] " << *MI; +      } +    } +  });    bool memShufDisabled = getmemShufDisabled();    if (memShufDisabled && !foundLSInPacket()) { | 

