diff options
Diffstat (limited to 'llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp b/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp index 02f07d88afc..7b043378819 100644 --- a/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp +++ b/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp @@ -1719,9 +1719,11 @@ void X86SpeculativeLoadHardeningPass::tracePredStateThroughBlocksAndHarden( // If we have at least one (non-frame-index, non-RIP) register operand, // and neither operand is load-dependent, we need to check the load. + // Also handle explicit references to RSP as used by idempotent atomic + // or with 0. unsigned BaseReg = 0, IndexReg = 0; if (!BaseMO.isFI() && BaseMO.getReg() != X86::RIP && - BaseMO.getReg() != X86::NoRegister) + BaseMO.getReg() != X86::RSP && BaseMO.getReg() != X86::NoRegister) BaseReg = BaseMO.getReg(); if (IndexMO.getReg() != X86::NoRegister) IndexReg = IndexMO.getReg(); |
