summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/X86/X86SchedSkylakeServer.td
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/lib/Target/X86/X86SchedSkylakeServer.td')
-rwxr-xr-xllvm/lib/Target/X86/X86SchedSkylakeServer.td104
1 files changed, 5 insertions, 99 deletions
diff --git a/llvm/lib/Target/X86/X86SchedSkylakeServer.td b/llvm/lib/Target/X86/X86SchedSkylakeServer.td
index 5a79f240273..283a3ed37e5 100755
--- a/llvm/lib/Target/X86/X86SchedSkylakeServer.td
+++ b/llvm/lib/Target/X86/X86SchedSkylakeServer.td
@@ -151,7 +151,9 @@ def : WriteRes<WriteFLoad, [SKXPort23]> { let Latency = 5; }
def : WriteRes<WriteFStore, [SKXPort237, SKXPort4]>;
def : WriteRes<WriteFMove, [SKXPort015]>;
-defm : SKXWriteResPair<WriteFAdd, [SKXPort1], 3>; // Floating point add/sub/compare.
+defm : SKXWriteResPair<WriteFAdd, [SKXPort1], 3>; // Floating point add/sub.
+defm : SKXWriteResPair<WriteFCmp, [SKXPort015], 4, [1], 1, 6>; // Floating point compare.
+defm : SKXWriteResPair<WriteFCom, [SKXPort0], 2>; // Floating point compare to flags.
defm : SKXWriteResPair<WriteFMul, [SKXPort0], 5>; // Floating point multiplication.
defm : SKXWriteResPair<WriteFDiv, [SKXPort0], 12>; // 10-14 cycles. // Floating point division.
defm : SKXWriteResPair<WriteFSqrt, [SKXPort0], 15>; // Floating point square root.
@@ -1406,18 +1408,10 @@ def SKXWriteResGroup12 : SchedWriteRes<[SKXPort0]> {
let NumMicroOps = 1;
let ResourceCycles = [1];
}
-def: InstRW<[SKXWriteResGroup12], (instregex "COMISDrr",
- "COMISSrr",
- "MMX_MOVD64from64rr",
+def: InstRW<[SKXWriteResGroup12], (instregex "MMX_MOVD64from64rr",
"MMX_MOVD64grr",
"MOVPDI2DIrr",
"MOVPQIto64rr",
- "UCOMISDrr",
- "UCOMISSrr",
- "VCOMISDZrr(b?)",
- "VCOMISDrr",
- "VCOMISSZrr(b?)",
- "VCOMISSrr",
"VMOVPDI2DIZrr",
"VMOVPDI2DIrr",
"VMOVPQIto64Zrr",
@@ -1425,11 +1419,7 @@ def: InstRW<[SKXWriteResGroup12], (instregex "COMISDrr",
"VTESTPDYrr",
"VTESTPDrr",
"VTESTPSYrr",
- "VTESTPSrr",
- "VUCOMISDZrr(b?)",
- "VUCOMISDrr",
- "VUCOMISSZrr(b?)",
- "VUCOMISSrr")>;
+ "VTESTPSrr")>;
def SKXWriteResGroup13 : SchedWriteRes<[SKXPort5]> {
let Latency = 2;
@@ -2162,21 +2152,9 @@ def: InstRW<[SKXWriteResGroup50], (instregex "ADDPDrr",
"ADDSSrr",
"ADDSUBPDrr",
"ADDSUBPSrr",
- "CMPPDrri",
- "CMPPSrri",
- "CMPSDrr",
- "CMPSSrr",
"CVTDQ2PSrr",
"CVTPS2DQrr",
"CVTTPS2DQrr",
- "MAX(C?)PDrr",
- "MAX(C?)PSrr",
- "MAX(C?)SDrr",
- "MAX(C?)SSrr",
- "MIN(C?)PDrr",
- "MIN(C?)PSrr",
- "MIN(C?)SDrr",
- "MIN(C?)SSrr",
"MULPDrr",
"MULPSrr",
"MULSDrr",
@@ -2212,12 +2190,6 @@ def: InstRW<[SKXWriteResGroup50], (instregex "ADDPDrr",
"VADDSUBPDrr",
"VADDSUBPSYrr",
"VADDSUBPSrr",
- "VCMPPDYrri",
- "VCMPPDrri",
- "VCMPPSYrri",
- "VCMPPSrri",
- "VCMPSDrr",
- "VCMPSSrr",
"VCVTDQ2PSYrr",
"VCVTDQ2PSZ128rr",
"VCVTDQ2PSZ256rr",
@@ -2284,34 +2256,6 @@ def: InstRW<[SKXWriteResGroup50], (instregex "ADDPDrr",
"VGETMANTPSZrri",
"VGETMANTSDZ128rri",
"VGETMANTSSZ128rri",
- "VMAX(C?)PDYrr",
- "VMAX(C?)PDZ128rr",
- "VMAX(C?)PDZ256rr",
- "VMAX(C?)PDZrr",
- "VMAX(C?)PDrr",
- "VMAX(C?)PSYrr",
- "VMAX(C?)PSZ128rr",
- "VMAX(C?)PSZ256rr",
- "VMAX(C?)PSZrr",
- "VMAX(C?)PSrr",
- "VMAX(C?)SDZrr",
- "VMAX(C?)SDrr",
- "VMAX(C?)SSZrr",
- "VMAX(C?)SSrr",
- "VMIN(C?)PDYrr",
- "VMIN(C?)PDZ128rr",
- "VMIN(C?)PDZ256rr",
- "VMIN(C?)PDZrr",
- "VMIN(C?)PDrr",
- "VMIN(C?)PSYrr",
- "VMIN(C?)PSZ128rr",
- "VMIN(C?)PSZ256rr",
- "VMIN(C?)PSZrr",
- "VMIN(C?)PSrr",
- "VMIN(C?)SDZrr",
- "VMIN(C?)SDrr",
- "VMIN(C?)SSZrr",
- "VMIN(C?)SSrr",
"VMULPDYrr",
"VMULPDZ128rr",
"VMULPDZ256rr",
@@ -3145,24 +3089,6 @@ def SKXWriteResGroup90 : SchedWriteRes<[SKXPort0,SKXPort5]> {
}
def: InstRW<[SKXWriteResGroup90], (instregex "VCVTDQ2PDYrr")>;
-def SKXWriteResGroup91 : SchedWriteRes<[SKXPort0,SKXPort23]> {
- let Latency = 7;
- let NumMicroOps = 2;
- let ResourceCycles = [1,1];
-}
-def: InstRW<[SKXWriteResGroup91], (instregex "COMISDrm",
- "COMISSrm",
- "UCOMISDrm",
- "UCOMISSrm",
- "VCOMISDZrm(b?)",
- "VCOMISDrm",
- "VCOMISSZrm(b?)",
- "VCOMISSrm",
- "VUCOMISDZrm(b?)",
- "VUCOMISDrm",
- "VUCOMISSZrm(b?)",
- "VUCOMISSrm")>;
-
def SKXWriteResGroup92 : SchedWriteRes<[SKXPort5,SKXPort23]> {
let Latency = 7;
let NumMicroOps = 2;
@@ -4744,16 +4670,10 @@ def: InstRW<[SKXWriteResGroup149], (instregex "ADDPDrm",
"ADDPSrm",
"ADDSUBPDrm",
"ADDSUBPSrm",
- "CMPPDrmi",
- "CMPPSrmi",
"CVTDQ2PSrm",
"CVTPS2DQrm",
"CVTSS2SDrm",
"CVTTPS2DQrm",
- "MAX(C?)PDrm",
- "MAX(C?)PSrm",
- "MIN(C?)PDrm",
- "MIN(C?)PSrm",
"MULPDrm",
"MULPSrm",
"PHMINPOSUWrm",
@@ -4775,8 +4695,6 @@ def: InstRW<[SKXWriteResGroup149], (instregex "ADDPDrm",
"VADDSSZrm",
"VADDSUBPDrm",
"VADDSUBPSrm",
- "VCMPPDrmi",
- "VCMPPSrmi",
"VCVTDQ2PDZ128rm(b?)",
"VCVTDQ2PSZ128rm(b?)",
"VCVTDQ2PSrm",
@@ -4817,18 +4735,6 @@ def: InstRW<[SKXWriteResGroup149], (instregex "ADDPDrm",
"VGETMANTPSZ128rm(b?)i",
"VGETMANTSDZ128rmi(b?)",
"VGETMANTSSZ128rmi(b?)",
- "VMAX(C?)PDZ128rm(b?)",
- "VMAX(C?)PDrm",
- "VMAX(C?)PSZ128rm(b?)",
- "VMAX(C?)PSrm",
- "VMAX(C?)SDZrm",
- "VMAX(C?)SSZrm",
- "VMIN(C?)PDZ128rm(b?)",
- "VMIN(C?)PDrm",
- "VMIN(C?)PSZ128rm(b?)",
- "VMIN(C?)PSrm",
- "VMIN(C?)SDZrm",
- "VMIN(C?)SSZrm",
"VMULPDZ128rm(b?)",
"VMULPDrm",
"VMULPSZ128rm(b?)",
OpenPOWER on IntegriCloud