summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/X86/X86SchedHaswell.td
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/lib/Target/X86/X86SchedHaswell.td')
-rw-r--r--llvm/lib/Target/X86/X86SchedHaswell.td6
1 files changed, 2 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86SchedHaswell.td b/llvm/lib/Target/X86/X86SchedHaswell.td
index 19064eff750..96f02546948 100644
--- a/llvm/lib/Target/X86/X86SchedHaswell.td
+++ b/llvm/lib/Target/X86/X86SchedHaswell.td
@@ -813,6 +813,7 @@ def HWWriteResGroup7 : SchedWriteRes<[HWPort06]> {
let NumMicroOps = 1;
let ResourceCycles = [1];
}
+def: InstRW<[HWWriteResGroup7], (instrs CDQ, CQO)>;
def: InstRW<[HWWriteResGroup7], (instregex "BT(16|32|64)ri8",
"BT(16|32|64)rr",
"BTC(16|32|64)ri8",
@@ -821,8 +822,6 @@ def: InstRW<[HWWriteResGroup7], (instregex "BT(16|32|64)ri8",
"BTR(16|32|64)rr",
"BTS(16|32|64)ri8",
"BTS(16|32|64)rr",
- "CDQ",
- "CQO",
"J(A|AE|B|BE|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)_1",
"J(A|AE|B|BE|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)_4",
"JMP_1",
@@ -954,14 +953,13 @@ def HWWriteResGroup10 : SchedWriteRes<[HWPort0156]> {
let NumMicroOps = 1;
let ResourceCycles = [1];
}
-def: InstRW<[HWWriteResGroup10], (instrs CWDE)>;
+def: InstRW<[HWWriteResGroup10], (instrs CBW, CWDE, CDQE)>;
def: InstRW<[HWWriteResGroup10], (instregex "ADD(8|16|32|64)ri",
"ADD(8|16|32|64)rr",
"ADD(8|16|32|64)i",
"AND(8|16|32|64)ri",
"AND(8|16|32|64)rr",
"AND(8|16|32|64)i",
- "CBW",
"CLC",
"CMC",
"CMP(8|16|32|64)ri",
OpenPOWER on IntegriCloud