diff options
Diffstat (limited to 'llvm/lib/Target/X86/X86SchedHaswell.td')
| -rw-r--r-- | llvm/lib/Target/X86/X86SchedHaswell.td | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86SchedHaswell.td b/llvm/lib/Target/X86/X86SchedHaswell.td index a9ffba0650a..2c0d8d8263f 100644 --- a/llvm/lib/Target/X86/X86SchedHaswell.td +++ b/llvm/lib/Target/X86/X86SchedHaswell.td @@ -159,7 +159,9 @@ defm : HWWriteResPair<WriteFSqrt, [HWPort0], 15>; defm : HWWriteResPair<WriteCvtF2I, [HWPort1], 3>; defm : HWWriteResPair<WriteCvtI2F, [HWPort1], 4>; defm : HWWriteResPair<WriteCvtF2F, [HWPort1], 3>; -defm : HWWriteResPair<WriteFMA, [HWPort01], 5>; +defm : HWWriteResPair<WriteFMA, [HWPort01], 5, [1], 1, 6>; +defm : HWWriteResPair<WriteFMAS, [HWPort01], 5, [1], 1, 5>; +defm : HWWriteResPair<WriteFMAY, [HWPort01], 5, [1], 1, 7>; defm : HWWriteResPair<WriteFSign, [HWPort0], 1>; defm : HWWriteResPair<WriteFLogic, [HWPort5], 1, [1], 1, 6>; defm : HWWriteResPair<WriteFShuffle, [HWPort5], 1>; @@ -1927,8 +1929,7 @@ def HWWriteResGroup92 : SchedWriteRes<[HWPort01,HWPort23]> { let ResourceCycles = [1,1]; } def: InstRW<[HWWriteResGroup92], (instregex "(V?)MULPDrm", - "(V?)MULPSrm", - "VF(N)?M(ADD|SUB|ADDSUB|SUBADD)(132|213|231)P(D|S)m")>; + "(V?)MULPSrm")>; def HWWriteResGroup92_1 : SchedWriteRes<[HWPort01,HWPort23]> { let Latency = 12; @@ -1936,8 +1937,7 @@ def HWWriteResGroup92_1 : SchedWriteRes<[HWPort01,HWPort23]> { let ResourceCycles = [1,1]; } def: InstRW<[HWWriteResGroup92_1], (instregex "VMULPDYrm", - "VMULPSYrm", - "VF(N)?M(ADD|SUB|ADDSUB|SUBADD)(132|213|231)P(D|S)Ym")>; + "VMULPSYrm")>; def HWWriteResGroup92_2 : SchedWriteRes<[HWPort01,HWPort23]> { let Latency = 10; |
