diff options
Diffstat (limited to 'llvm/lib/Target/X86/X86SchedHaswell.td')
| -rw-r--r-- | llvm/lib/Target/X86/X86SchedHaswell.td | 12 |
1 files changed, 3 insertions, 9 deletions
diff --git a/llvm/lib/Target/X86/X86SchedHaswell.td b/llvm/lib/Target/X86/X86SchedHaswell.td index 41a26e726b5..916bb309d32 100644 --- a/llvm/lib/Target/X86/X86SchedHaswell.td +++ b/llvm/lib/Target/X86/X86SchedHaswell.td @@ -126,6 +126,8 @@ defm : HWWriteResPair<WriteIMul64, [HWPort1], 3>; defm : X86WriteRes<WriteBSWAP32, [HWPort15], 1, [1], 1>; defm : X86WriteRes<WriteBSWAP64, [HWPort06, HWPort15], 2, [1,1], 2>; +defm : X86WriteRes<WriteCMPXCHG,[HWPort06, HWPort0156], 5, [2,3], 5>; +defm : X86WriteRes<WriteCMPXCHGRMW,[HWPort23,HWPort06,HWPort0156,HWPort237,HWPort4], 9, [1,2,1,1,1], 6>; defm : X86WriteRes<WriteXCHG, [HWPort0156], 2, [3], 3>; def : WriteRes<WriteIMulH, []> { let Latency = 3; } @@ -1349,8 +1351,7 @@ def HWWriteResGroup69 : SchedWriteRes<[HWPort4,HWPort23,HWPort237,HWPort06,HWPor let NumMicroOps = 6; let ResourceCycles = [1,1,1,2,1]; } -def: InstRW<[HWWriteResGroup69], (instregex "CMPXCHG(8|16|32|64)rm", - "ROL(8|16|32|64)mCL", +def: InstRW<[HWWriteResGroup69], (instregex "ROL(8|16|32|64)mCL", "SAR(8|16|32|64)mCL", "SHL(8|16|32|64)mCL", "SHR(8|16|32|64)mCL")>; @@ -1578,13 +1579,6 @@ def HWWriteResGroup100 : SchedWriteRes<[HWPort06,HWPort0156]> { } def: InstRW<[HWWriteResGroup100], (instrs XSETBV)>; -def HWWriteResGroup101 : SchedWriteRes<[HWPort06,HWPort0156]> { - let Latency = 5; - let NumMicroOps = 5; - let ResourceCycles = [2,3]; -} -def: InstRW<[HWWriteResGroup101], (instregex "CMPXCHG(8|16|32|64)rr")>; - def HWWriteResGroup102 : SchedWriteRes<[HWPort1,HWPort5]> { let Latency = 6; let NumMicroOps = 2; |
