diff options
Diffstat (limited to 'llvm/lib/Target/X86/X86SchedHaswell.td')
| -rw-r--r-- | llvm/lib/Target/X86/X86SchedHaswell.td | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86SchedHaswell.td b/llvm/lib/Target/X86/X86SchedHaswell.td index 24dd081d1eb..c8a876a35c8 100644 --- a/llvm/lib/Target/X86/X86SchedHaswell.td +++ b/llvm/lib/Target/X86/X86SchedHaswell.td @@ -3122,7 +3122,7 @@ def: InstRW<[HWWriteResGroup73], (instregex "CVTDQ2PDrr")>; def: InstRW<[HWWriteResGroup73], (instregex "CVTPD2DQrr")>; def: InstRW<[HWWriteResGroup73], (instregex "CVTPD2PSrr")>; def: InstRW<[HWWriteResGroup73], (instregex "CVTSD2SSrr")>; -def: InstRW<[HWWriteResGroup73], (instregex "CVTSI2SD64rr")>; +def: InstRW<[HWWriteResGroup73], (instregex "CVTSI642SDrr")>; def: InstRW<[HWWriteResGroup73], (instregex "CVTSI2SDrr")>; def: InstRW<[HWWriteResGroup73], (instregex "CVTSI2SSrr")>; def: InstRW<[HWWriteResGroup73], (instregex "CVTTPD2DQrr")>; @@ -3136,7 +3136,7 @@ def: InstRW<[HWWriteResGroup73], (instregex "VCVTPD2DQrr")>; def: InstRW<[HWWriteResGroup73], (instregex "VCVTPD2PSrr")>; def: InstRW<[HWWriteResGroup73], (instregex "VCVTPS2PHrr")>; def: InstRW<[HWWriteResGroup73], (instregex "VCVTSD2SSrr")>; -def: InstRW<[HWWriteResGroup73], (instregex "VCVTSI2SD64rr")>; +def: InstRW<[HWWriteResGroup73], (instregex "VCVTSI642SDrr")>; def: InstRW<[HWWriteResGroup73], (instregex "VCVTSI2SDrr")>; def: InstRW<[HWWriteResGroup73], (instregex "VCVTSI2SSrr")>; def: InstRW<[HWWriteResGroup73], (instregex "VCVTTPD2DQrr")>; @@ -3688,12 +3688,12 @@ def HWWriteResGroup93 : SchedWriteRes<[HWPort1,HWPort5]> { let NumMicroOps = 3; let ResourceCycles = [1,2]; } -def: InstRW<[HWWriteResGroup93], (instregex "CVTSI2SS64rr")>; +def: InstRW<[HWWriteResGroup93], (instregex "CVTSI642SSrr")>; def: InstRW<[HWWriteResGroup93], (instregex "HADDPDrr")>; def: InstRW<[HWWriteResGroup93], (instregex "HADDPSrr")>; def: InstRW<[HWWriteResGroup93], (instregex "HSUBPDrr")>; def: InstRW<[HWWriteResGroup93], (instregex "HSUBPSrr")>; -def: InstRW<[HWWriteResGroup93], (instregex "VCVTSI2SS64rr")>; +def: InstRW<[HWWriteResGroup93], (instregex "VCVTSI642SSrr")>; def: InstRW<[HWWriteResGroup93], (instregex "VHADDPDYrr")>; def: InstRW<[HWWriteResGroup93], (instregex "VHADDPDrr")>; def: InstRW<[HWWriteResGroup93], (instregex "VHADDPSYrr")>; |

