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-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.td8
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td
index 37e5c957a10..bfb8fabd020 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.td
+++ b/llvm/lib/Target/X86/X86InstrInfo.td
@@ -189,10 +189,10 @@ def MRM6m : Format<30>; def MRM7m : Format<31>;
//===----------------------------------------------------------------------===//
// X86 Instruction Predicate Definitions.
-def HasSSE1 : Predicate<"X86Vector >= SSE">;
-def HasSSE2 : Predicate<"X86Vector >= SSE2">;
-def HasSSE3 : Predicate<"X86Vector >= SSE3">;
-def FPStack : Predicate<"X86Vector < SSE2">;
+def HasSSE1 : Predicate<"Subtarget->hasSSE()">;
+def HasSSE2 : Predicate<"Subtarget->hasSSE2()">;
+def HasSSE3 : Predicate<"Subtarget->hasSSE3()">;
+def FPStack : Predicate<"!Subtarget->hasSSE2()">;
//===----------------------------------------------------------------------===//
// X86 specific pattern fragments.
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