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-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.h12
1 files changed, 11 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h
index 6181dbd2a6a..2fdc0c22e39 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.h
+++ b/llvm/lib/Target/X86/X86ISelLowering.h
@@ -75,6 +75,9 @@ namespace llvm {
///
CALL,
+ /// Same as call except it adds the NoTrack prefix.
+ NT_CALL,
+
/// This operation implements the lowering for readcyclecounter.
RDTSC_DAG,
@@ -122,6 +125,10 @@ namespace llvm {
/// or TEST instruction.
BRCOND,
+ /// BRIND node with NoTrack prefix. Operand 0 is the chain operand and
+ /// operand 1 is the target address.
+ NT_BRIND,
+
/// Return with a flag operand. Operand 0 is the chain operand, operand
/// 1 is the number of bytes of stack to pop.
RET_FLAG,
@@ -1114,9 +1121,12 @@ namespace llvm {
bool lowerInterleavedStore(StoreInst *SI, ShuffleVectorInst *SVI,
unsigned Factor) const override;
-
void finalizeLowering(MachineFunction &MF) const override;
+ SDValue expandIndirectJTBranch(const SDLoc& dl, SDValue Value,
+ SDValue Addr, SelectionDAG &DAG)
+ const override;
+
protected:
std::pair<const TargetRegisterClass *, uint8_t>
findRepresentativeClass(const TargetRegisterInfo *TRI,
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