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-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h
index 120da0fb7b4..3ed8d18f4ed 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.h
+++ b/llvm/lib/Target/X86/X86ISelLowering.h
@@ -349,6 +349,18 @@ namespace llvm {
/// type.
virtual bool isLegalAddressScale(int64_t S, const Type *Ty) const;
+ /// isLegalAddressScaleAndImm - Return true if S works for
+ /// IsLegalAddressScale and V works for isLegalAddressImmediate _and_
+ /// both can be applied simultaneously to the same instruction.
+ virtual bool isLegalAddressScaleAndImm(int64_t S, int64_t V,
+ const Type *Ty) const;
+
+ /// isLegalAddressScaleAndImm - Return true if S works for
+ /// IsLegalAddressScale and GV works for isLegalAddressImmediate _and_
+ /// both can be applied simultaneously to the same instruction.
+ virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
+ const Type *Ty) const;
+
/// isShuffleMaskLegal - Targets can use this to indicate that they only
/// support *some* VECTOR_SHUFFLE operations, those with specific masks.
/// By default, if a target supports the VECTOR_SHUFFLE node, all mask
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