diff options
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 41 |
1 files changed, 20 insertions, 21 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 57e50d30af8..8aecfd8fe7d 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -14910,36 +14910,35 @@ static SDValue ExtractBitFromMaskVector(SDValue Op, SelectionDAG &DAG, return DAG.getNode(ISD::TRUNCATE, dl, EltVT, Elt); } - // Canonicalize result type to MVT::i32. - if (EltVT != MVT::i32) { - SDValue Extract = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, - Vec, Idx); - return DAG.getAnyExtOrTrunc(Extract, dl, EltVT); - } - unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue(); - // Extracts from element 0 are always allowed. - if (IdxVal == 0) - return Op; - // If the kshift instructions of the correct width aren't natively supported // then we need to promote the vector to the native size to get the correct // zeroing behavior. - if ((!Subtarget.hasDQI() && (VecVT.getVectorNumElements() == 8)) || - (VecVT.getVectorNumElements() < 8)) { + if (VecVT.getVectorNumElements() < 16) { VecVT = MVT::v16i1; - Vec = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, VecVT, - DAG.getUNDEF(VecVT), - Vec, + Vec = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, MVT::v16i1, + DAG.getUNDEF(VecVT), Vec, DAG.getIntPtrConstant(0, dl)); } - // Use kshiftr instruction to move to the lower element. - Vec = DAG.getNode(X86ISD::KSHIFTR, dl, VecVT, Vec, - DAG.getConstant(IdxVal, dl, MVT::i8)); - return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, Vec, - DAG.getIntPtrConstant(0, dl)); + // Extracts from element 0 are always allowed. + if (IdxVal != 0) { + // Use kshiftr instruction to move to the lower element. + Vec = DAG.getNode(X86ISD::KSHIFTR, dl, VecVT, Vec, + DAG.getConstant(IdxVal, dl, MVT::i8)); + } + + // Shrink to v16i1 since that's always legal. + if (VecVT.getVectorNumElements() > 16) { + VecVT = MVT::v16i1; + Vec = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VecVT, Vec, + DAG.getIntPtrConstant(0, dl)); + } + + // Convert to a bitcast+aext/trunc. + MVT CastVT = MVT::getIntegerVT(VecVT.getVectorNumElements()); + return DAG.getAnyExtOrTrunc(DAG.getBitcast(CastVT, Vec), dl, EltVT); } SDValue |

