diff options
Diffstat (limited to 'llvm/lib/Target/X86/X86FixupBWInsts.cpp')
-rw-r--r-- | llvm/lib/Target/X86/X86FixupBWInsts.cpp | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/llvm/lib/Target/X86/X86FixupBWInsts.cpp b/llvm/lib/Target/X86/X86FixupBWInsts.cpp index 855ea683a8a..9a2f172aade 100644 --- a/llvm/lib/Target/X86/X86FixupBWInsts.cpp +++ b/llvm/lib/Target/X86/X86FixupBWInsts.cpp @@ -249,15 +249,16 @@ bool FixupBWInstPass::getSuperRegDestIfDead(MachineInstr *OrigMI, assert((MO.isDef() || MO.isUse()) && "Expected Def or Use only!"); - for (MCSuperRegIterator Supers(OrigDestReg, TRI, true); Supers.isValid(); - ++Supers) { - if (*Supers == MO.getReg()) { - if (MO.isDef()) - IsDefined = true; - else - return false; // SuperReg Imp-used' -> live before the MI - } - } + if (MO.isDef() && TRI->isSuperRegisterEq(OrigDestReg, MO.getReg())) + IsDefined = true; + + // If MO is a use of any part of the destination register but is not equal + // to OrigDestReg or one of its subregisters, we cannot use SuperDestReg. + // For example, if OrigDestReg is %al then an implicit use of %ah, %ax, + // %eax, or %rax will prevent us from using the %eax register. + if (MO.isUse() && !TRI->isSubRegisterEq(OrigDestReg, MO.getReg()) && + TRI->regsOverlap(SuperDestReg, MO.getReg())) + return false; } // Reg is not Imp-def'ed -> it's live both before/after the instruction. if (!IsDefined) |