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-rw-r--r--llvm/lib/Target/X86/X86CodeEmitter.cpp12
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/Target/X86/X86CodeEmitter.cpp b/llvm/lib/Target/X86/X86CodeEmitter.cpp
index 480c0cd27ec..859eb909d94 100644
--- a/llvm/lib/Target/X86/X86CodeEmitter.cpp
+++ b/llvm/lib/Target/X86/X86CodeEmitter.cpp
@@ -578,19 +578,19 @@ void Emitter<CodeEmitter>::emitInstruction(const MachineInstr &MI,
llvm_unreachable("psuedo instructions should be removed before code"
" emission");
break;
- case TargetInstrInfo::INLINEASM:
+ case TargetOpcode::INLINEASM:
// We allow inline assembler nodes with empty bodies - they can
// implicitly define registers, which is ok for JIT.
if (MI.getOperand(0).getSymbolName()[0])
llvm_report_error("JIT does not support inline asm!");
break;
- case TargetInstrInfo::DBG_LABEL:
- case TargetInstrInfo::EH_LABEL:
- case TargetInstrInfo::GC_LABEL:
+ case TargetOpcode::DBG_LABEL:
+ case TargetOpcode::EH_LABEL:
+ case TargetOpcode::GC_LABEL:
MCE.emitLabel(MI.getOperand(0).getImm());
break;
- case TargetInstrInfo::IMPLICIT_DEF:
- case TargetInstrInfo::KILL:
+ case TargetOpcode::IMPLICIT_DEF:
+ case TargetOpcode::KILL:
case X86::FP_REG_KILL:
break;
case X86::MOVPC32r: {
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