diff options
Diffstat (limited to 'llvm/lib/Target/X86/MCTargetDesc')
| -rw-r--r-- | llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 10 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 19 |
2 files changed, 29 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h index 5b1cf5a1a58..404a7e80e6c 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h +++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h @@ -355,6 +355,16 @@ namespace X86II { // XOPA - Prefix to encode 0xA in VEX.MMMM of XOP instructions. XOPA = 22 << Op0Shift, + // PD - Prefix code for packed double precision vector floating point + // operations performed in the SSE registers. + PD = 23 << Op0Shift, + + // T8PD - Prefix before and after 0x0F. Combination of T8 and PD. + T8PD = 24 << Op0Shift, + + // TAPD - Prefix before and after 0x0F. Combination of TA and PD. + TAPD = 25 << Op0Shift, + //===------------------------------------------------------------------===// // REX_W - REX prefixes are instruction prefixes used in 64-bit mode. // They are used to specify GPRs and SSE registers, 64-bit operand size, diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp index 48bd6f19351..bd3c00626d6 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp +++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp @@ -717,6 +717,10 @@ void X86MCCodeEmitter::EmitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, case X86II::TA: // 0F 3A VEX_5M = 0x3; break; + case X86II::T8PD: // 66 0F 38 + VEX_PP = 0x1; + VEX_5M = 0x2; + break; case X86II::T8XS: // F3 0F 38 VEX_PP = 0x2; VEX_5M = 0x2; @@ -725,10 +729,17 @@ void X86MCCodeEmitter::EmitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, VEX_PP = 0x3; VEX_5M = 0x2; break; + case X86II::TAPD: // 66 0F 3A + VEX_PP = 0x1; + VEX_5M = 0x3; + break; case X86II::TAXD: // F2 0F 3A VEX_PP = 0x3; VEX_5M = 0x3; break; + case X86II::PD: // 66 0F + VEX_PP = 0x1; + break; case X86II::XS: // F3 0F VEX_PP = 0x2; break; @@ -1215,6 +1226,12 @@ void X86MCCodeEmitter::EmitOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, case X86II::A7: // 0F A7 Need0FPrefix = true; break; + case X86II::PD: // 66 0F + case X86II::T8PD: // 66 0F 38 + case X86II::TAPD: // 66 0F 3A + EmitByte(0x66, CurByte, OS); + Need0FPrefix = true; + break; case X86II::XS: // F3 0F case X86II::T8XS: // F3 0F 38 EmitByte(0xF3, CurByte, OS); @@ -1252,11 +1269,13 @@ void X86MCCodeEmitter::EmitOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, // FIXME: Pull this up into previous switch if REX can be moved earlier. switch (TSFlags & X86II::Op0Mask) { + case X86II::T8PD: // 66 0F 38 case X86II::T8XS: // F3 0F 38 case X86II::T8XD: // F2 0F 38 case X86II::T8: // 0F 38 EmitByte(0x38, CurByte, OS); break; + case X86II::TAPD: // 66 0F 3A case X86II::TAXD: // F2 0F 3A case X86II::TA: // 0F 3A EmitByte(0x3A, CurByte, OS); |
