diff options
Diffstat (limited to 'llvm/lib/Target/X86/InstPrinter')
| -rw-r--r-- | llvm/lib/Target/X86/InstPrinter/CMakeLists.txt | 6 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/InstPrinter/LLVMBuild.txt | 22 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp | 487 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.h | 124 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp | 1310 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/InstPrinter/X86InstComments.h | 26 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/InstPrinter/X86InstPrinterCommon.cpp | 337 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/InstPrinter/X86InstPrinterCommon.h | 40 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp | 445 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/InstPrinter/X86IntelInstPrinter.h | 144 |
10 files changed, 0 insertions, 2941 deletions
diff --git a/llvm/lib/Target/X86/InstPrinter/CMakeLists.txt b/llvm/lib/Target/X86/InstPrinter/CMakeLists.txt deleted file mode 100644 index a61efaed33a..00000000000 --- a/llvm/lib/Target/X86/InstPrinter/CMakeLists.txt +++ /dev/null @@ -1,6 +0,0 @@ -add_llvm_library(LLVMX86AsmPrinter - X86ATTInstPrinter.cpp - X86IntelInstPrinter.cpp - X86InstComments.cpp - X86InstPrinterCommon.cpp - ) diff --git a/llvm/lib/Target/X86/InstPrinter/LLVMBuild.txt b/llvm/lib/Target/X86/InstPrinter/LLVMBuild.txt deleted file mode 100644 index 48676d4893a..00000000000 --- a/llvm/lib/Target/X86/InstPrinter/LLVMBuild.txt +++ /dev/null @@ -1,22 +0,0 @@ -;===- ./lib/Target/X86/InstPrinter/LLVMBuild.txt ---------------*- Conf -*--===; -; -; Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -; See https://llvm.org/LICENSE.txt for license information. -; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -; -;===------------------------------------------------------------------------===; -; -; This is an LLVMBuild description file for the components in this subdirectory. -; -; For more information on the LLVMBuild system, please see: -; -; http://llvm.org/docs/LLVMBuild.html -; -;===------------------------------------------------------------------------===; - -[component_0] -type = Library -name = X86AsmPrinter -parent = X86 -required_libraries = MC Support X86Utils -add_to_library_groups = X86 diff --git a/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp b/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp deleted file mode 100644 index ea36013681a..00000000000 --- a/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp +++ /dev/null @@ -1,487 +0,0 @@ -//===-- X86ATTInstPrinter.cpp - AT&T assembly instruction printing --------===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// -// -// This file includes code for rendering MCInst instances as AT&T-style -// assembly. -// -//===----------------------------------------------------------------------===// - -#include "X86ATTInstPrinter.h" -#include "MCTargetDesc/X86BaseInfo.h" -#include "X86InstComments.h" -#include "llvm/MC/MCExpr.h" -#include "llvm/MC/MCInst.h" -#include "llvm/MC/MCInstrInfo.h" -#include "llvm/MC/MCSubtargetInfo.h" -#include "llvm/Support/Casting.h" -#include "llvm/Support/ErrorHandling.h" -#include "llvm/Support/Format.h" -#include "llvm/Support/raw_ostream.h" -#include <cassert> -#include <cinttypes> -#include <cstdint> - -using namespace llvm; - -#define DEBUG_TYPE "asm-printer" - -// Include the auto-generated portion of the assembly writer. -#define PRINT_ALIAS_INSTR -#include "X86GenAsmWriter.inc" - -void X86ATTInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { - OS << markup("<reg:") << '%' << getRegisterName(RegNo) << markup(">"); -} - -void X86ATTInstPrinter::printInst(const MCInst *MI, raw_ostream &OS, - StringRef Annot, const MCSubtargetInfo &STI) { - // If verbose assembly is enabled, we can print some informative comments. - if (CommentStream) - HasCustomInstComment = EmitAnyX86InstComments(MI, *CommentStream, MII); - - printInstFlags(MI, OS); - - // Output CALLpcrel32 as "callq" in 64-bit mode. - // In Intel annotation it's always emitted as "call". - // - // TODO: Probably this hack should be redesigned via InstAlias in - // InstrInfo.td as soon as Requires clause is supported properly - // for InstAlias. - if (MI->getOpcode() == X86::CALLpcrel32 && - (STI.getFeatureBits()[X86::Mode64Bit])) { - OS << "\tcallq\t"; - printPCRelImm(MI, 0, OS); - } - // data16 and data32 both have the same encoding of 0x66. While data32 is - // valid only in 16 bit systems, data16 is valid in the rest. - // There seems to be some lack of support of the Requires clause that causes - // 0x66 to be interpreted as "data16" by the asm printer. - // Thus we add an adjustment here in order to print the "right" instruction. - else if (MI->getOpcode() == X86::DATA16_PREFIX && - STI.getFeatureBits()[X86::Mode16Bit]) { - OS << "\tdata32"; - } - // Try to print any aliases first. - else if (!printAliasInstr(MI, OS) && - !printVecCompareInstr(MI, OS)) - printInstruction(MI, OS); - - // Next always print the annotation. - printAnnotation(OS, Annot); -} - -bool X86ATTInstPrinter::printVecCompareInstr(const MCInst *MI, - raw_ostream &OS) { - if (MI->getNumOperands() == 0 || - !MI->getOperand(MI->getNumOperands() - 1).isImm()) - return false; - - int64_t Imm = MI->getOperand(MI->getNumOperands() - 1).getImm(); - - const MCInstrDesc &Desc = MII.get(MI->getOpcode()); - - // Custom print the vector compare instructions to get the immediate - // translated into the mnemonic. - switch (MI->getOpcode()) { - case X86::CMPPDrmi: case X86::CMPPDrri: - case X86::CMPPSrmi: case X86::CMPPSrri: - case X86::CMPSDrm: case X86::CMPSDrr: - case X86::CMPSDrm_Int: case X86::CMPSDrr_Int: - case X86::CMPSSrm: case X86::CMPSSrr: - case X86::CMPSSrm_Int: case X86::CMPSSrr_Int: - if (Imm >= 0 && Imm <= 7) { - OS << '\t'; - printCMPMnemonic(MI, /*IsVCMP*/false, OS); - - if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) { - if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XS) - printdwordmem(MI, 2, OS); - else if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XD) - printqwordmem(MI, 2, OS); - else - printxmmwordmem(MI, 2, OS); - } else - printOperand(MI, 2, OS); - - // Skip operand 1 as its tied to the dest. - - OS << ", "; - printOperand(MI, 0, OS); - return true; - } - break; - - case X86::VCMPPDrmi: case X86::VCMPPDrri: - case X86::VCMPPDYrmi: case X86::VCMPPDYrri: - case X86::VCMPPDZ128rmi: case X86::VCMPPDZ128rri: - case X86::VCMPPDZ256rmi: case X86::VCMPPDZ256rri: - case X86::VCMPPDZrmi: case X86::VCMPPDZrri: - case X86::VCMPPSrmi: case X86::VCMPPSrri: - case X86::VCMPPSYrmi: case X86::VCMPPSYrri: - case X86::VCMPPSZ128rmi: case X86::VCMPPSZ128rri: - case X86::VCMPPSZ256rmi: case X86::VCMPPSZ256rri: - case X86::VCMPPSZrmi: case X86::VCMPPSZrri: - case X86::VCMPSDrm: case X86::VCMPSDrr: - case X86::VCMPSDZrm: case X86::VCMPSDZrr: - case X86::VCMPSDrm_Int: case X86::VCMPSDrr_Int: - case X86::VCMPSDZrm_Int: case X86::VCMPSDZrr_Int: - case X86::VCMPSSrm: case X86::VCMPSSrr: - case X86::VCMPSSZrm: case X86::VCMPSSZrr: - case X86::VCMPSSrm_Int: case X86::VCMPSSrr_Int: - case X86::VCMPSSZrm_Int: case X86::VCMPSSZrr_Int: - case X86::VCMPPDZ128rmik: case X86::VCMPPDZ128rrik: - case X86::VCMPPDZ256rmik: case X86::VCMPPDZ256rrik: - case X86::VCMPPDZrmik: case X86::VCMPPDZrrik: - case X86::VCMPPSZ128rmik: case X86::VCMPPSZ128rrik: - case X86::VCMPPSZ256rmik: case X86::VCMPPSZ256rrik: - case X86::VCMPPSZrmik: case X86::VCMPPSZrrik: - case X86::VCMPSDZrm_Intk: case X86::VCMPSDZrr_Intk: - case X86::VCMPSSZrm_Intk: case X86::VCMPSSZrr_Intk: - case X86::VCMPPDZ128rmbi: case X86::VCMPPDZ128rmbik: - case X86::VCMPPDZ256rmbi: case X86::VCMPPDZ256rmbik: - case X86::VCMPPDZrmbi: case X86::VCMPPDZrmbik: - case X86::VCMPPSZ128rmbi: case X86::VCMPPSZ128rmbik: - case X86::VCMPPSZ256rmbi: case X86::VCMPPSZ256rmbik: - case X86::VCMPPSZrmbi: case X86::VCMPPSZrmbik: - case X86::VCMPPDZrrib: case X86::VCMPPDZrribk: - case X86::VCMPPSZrrib: case X86::VCMPPSZrribk: - case X86::VCMPSDZrrb_Int: case X86::VCMPSDZrrb_Intk: - case X86::VCMPSSZrrb_Int: case X86::VCMPSSZrrb_Intk: - if (Imm >= 0 && Imm <= 31) { - OS << '\t'; - printCMPMnemonic(MI, /*IsVCMP*/true, OS); - - unsigned CurOp = (Desc.TSFlags & X86II::EVEX_K) ? 3 : 2; - - if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) { - if (Desc.TSFlags & X86II::EVEX_B) { - // Broadcast form. - // Load size is based on W-bit. - if (Desc.TSFlags & X86II::VEX_W) - printqwordmem(MI, CurOp--, OS); - else - printdwordmem(MI, CurOp--, OS); - - // Print the number of elements broadcasted. - unsigned NumElts; - if (Desc.TSFlags & X86II::EVEX_L2) - NumElts = (Desc.TSFlags & X86II::VEX_W) ? 8 : 16; - else if (Desc.TSFlags & X86II::VEX_L) - NumElts = (Desc.TSFlags & X86II::VEX_W) ? 4 : 8; - else - NumElts = (Desc.TSFlags & X86II::VEX_W) ? 2 : 4; - OS << "{1to" << NumElts << "}"; - } else { - if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XS) - printdwordmem(MI, CurOp--, OS); - else if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XD) - printqwordmem(MI, CurOp--, OS); - else if (Desc.TSFlags & X86II::EVEX_L2) - printzmmwordmem(MI, CurOp--, OS); - else if (Desc.TSFlags & X86II::VEX_L) - printymmwordmem(MI, CurOp--, OS); - else - printxmmwordmem(MI, CurOp--, OS); - } - } else { - if (Desc.TSFlags & X86II::EVEX_B) - OS << "{sae}, "; - printOperand(MI, CurOp--, OS); - } - - OS << ", "; - printOperand(MI, CurOp--, OS); - OS << ", "; - printOperand(MI, 0, OS); - if (CurOp > 0) { - // Print mask operand. - OS << " {"; - printOperand(MI, CurOp--, OS); - OS << "}"; - } - - return true; - } - break; - - case X86::VPCOMBmi: case X86::VPCOMBri: - case X86::VPCOMDmi: case X86::VPCOMDri: - case X86::VPCOMQmi: case X86::VPCOMQri: - case X86::VPCOMUBmi: case X86::VPCOMUBri: - case X86::VPCOMUDmi: case X86::VPCOMUDri: - case X86::VPCOMUQmi: case X86::VPCOMUQri: - case X86::VPCOMUWmi: case X86::VPCOMUWri: - case X86::VPCOMWmi: case X86::VPCOMWri: - if (Imm >= 0 && Imm <= 7) { - OS << '\t'; - printVPCOMMnemonic(MI, OS); - - if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) - printxmmwordmem(MI, 2, OS); - else - printOperand(MI, 2, OS); - - OS << ", "; - printOperand(MI, 1, OS); - OS << ", "; - printOperand(MI, 0, OS); - return true; - } - break; - - case X86::VPCMPBZ128rmi: case X86::VPCMPBZ128rri: - case X86::VPCMPBZ256rmi: case X86::VPCMPBZ256rri: - case X86::VPCMPBZrmi: case X86::VPCMPBZrri: - case X86::VPCMPDZ128rmi: case X86::VPCMPDZ128rri: - case X86::VPCMPDZ256rmi: case X86::VPCMPDZ256rri: - case X86::VPCMPDZrmi: case X86::VPCMPDZrri: - case X86::VPCMPQZ128rmi: case X86::VPCMPQZ128rri: - case X86::VPCMPQZ256rmi: case X86::VPCMPQZ256rri: - case X86::VPCMPQZrmi: case X86::VPCMPQZrri: - case X86::VPCMPUBZ128rmi: case X86::VPCMPUBZ128rri: - case X86::VPCMPUBZ256rmi: case X86::VPCMPUBZ256rri: - case X86::VPCMPUBZrmi: case X86::VPCMPUBZrri: - case X86::VPCMPUDZ128rmi: case X86::VPCMPUDZ128rri: - case X86::VPCMPUDZ256rmi: case X86::VPCMPUDZ256rri: - case X86::VPCMPUDZrmi: case X86::VPCMPUDZrri: - case X86::VPCMPUQZ128rmi: case X86::VPCMPUQZ128rri: - case X86::VPCMPUQZ256rmi: case X86::VPCMPUQZ256rri: - case X86::VPCMPUQZrmi: case X86::VPCMPUQZrri: - case X86::VPCMPUWZ128rmi: case X86::VPCMPUWZ128rri: - case X86::VPCMPUWZ256rmi: case X86::VPCMPUWZ256rri: - case X86::VPCMPUWZrmi: case X86::VPCMPUWZrri: - case X86::VPCMPWZ128rmi: case X86::VPCMPWZ128rri: - case X86::VPCMPWZ256rmi: case X86::VPCMPWZ256rri: - case X86::VPCMPWZrmi: case X86::VPCMPWZrri: - case X86::VPCMPBZ128rmik: case X86::VPCMPBZ128rrik: - case X86::VPCMPBZ256rmik: case X86::VPCMPBZ256rrik: - case X86::VPCMPBZrmik: case X86::VPCMPBZrrik: - case X86::VPCMPDZ128rmik: case X86::VPCMPDZ128rrik: - case X86::VPCMPDZ256rmik: case X86::VPCMPDZ256rrik: - case X86::VPCMPDZrmik: case X86::VPCMPDZrrik: - case X86::VPCMPQZ128rmik: case X86::VPCMPQZ128rrik: - case X86::VPCMPQZ256rmik: case X86::VPCMPQZ256rrik: - case X86::VPCMPQZrmik: case X86::VPCMPQZrrik: - case X86::VPCMPUBZ128rmik: case X86::VPCMPUBZ128rrik: - case X86::VPCMPUBZ256rmik: case X86::VPCMPUBZ256rrik: - case X86::VPCMPUBZrmik: case X86::VPCMPUBZrrik: - case X86::VPCMPUDZ128rmik: case X86::VPCMPUDZ128rrik: - case X86::VPCMPUDZ256rmik: case X86::VPCMPUDZ256rrik: - case X86::VPCMPUDZrmik: case X86::VPCMPUDZrrik: - case X86::VPCMPUQZ128rmik: case X86::VPCMPUQZ128rrik: - case X86::VPCMPUQZ256rmik: case X86::VPCMPUQZ256rrik: - case X86::VPCMPUQZrmik: case X86::VPCMPUQZrrik: - case X86::VPCMPUWZ128rmik: case X86::VPCMPUWZ128rrik: - case X86::VPCMPUWZ256rmik: case X86::VPCMPUWZ256rrik: - case X86::VPCMPUWZrmik: case X86::VPCMPUWZrrik: - case X86::VPCMPWZ128rmik: case X86::VPCMPWZ128rrik: - case X86::VPCMPWZ256rmik: case X86::VPCMPWZ256rrik: - case X86::VPCMPWZrmik: case X86::VPCMPWZrrik: - case X86::VPCMPDZ128rmib: case X86::VPCMPDZ128rmibk: - case X86::VPCMPDZ256rmib: case X86::VPCMPDZ256rmibk: - case X86::VPCMPDZrmib: case X86::VPCMPDZrmibk: - case X86::VPCMPQZ128rmib: case X86::VPCMPQZ128rmibk: - case X86::VPCMPQZ256rmib: case X86::VPCMPQZ256rmibk: - case X86::VPCMPQZrmib: case X86::VPCMPQZrmibk: - case X86::VPCMPUDZ128rmib: case X86::VPCMPUDZ128rmibk: - case X86::VPCMPUDZ256rmib: case X86::VPCMPUDZ256rmibk: - case X86::VPCMPUDZrmib: case X86::VPCMPUDZrmibk: - case X86::VPCMPUQZ128rmib: case X86::VPCMPUQZ128rmibk: - case X86::VPCMPUQZ256rmib: case X86::VPCMPUQZ256rmibk: - case X86::VPCMPUQZrmib: case X86::VPCMPUQZrmibk: - if ((Imm >= 0 && Imm <= 2) || (Imm >= 4 && Imm <= 6)) { - OS << '\t'; - printVPCMPMnemonic(MI, OS); - - unsigned CurOp = (Desc.TSFlags & X86II::EVEX_K) ? 3 : 2; - - if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) { - if (Desc.TSFlags & X86II::EVEX_B) { - // Broadcast form. - // Load size is based on W-bit as only D and Q are supported. - if (Desc.TSFlags & X86II::VEX_W) - printqwordmem(MI, CurOp--, OS); - else - printdwordmem(MI, CurOp--, OS); - - // Print the number of elements broadcasted. - unsigned NumElts; - if (Desc.TSFlags & X86II::EVEX_L2) - NumElts = (Desc.TSFlags & X86II::VEX_W) ? 8 : 16; - else if (Desc.TSFlags & X86II::VEX_L) - NumElts = (Desc.TSFlags & X86II::VEX_W) ? 4 : 8; - else - NumElts = (Desc.TSFlags & X86II::VEX_W) ? 2 : 4; - OS << "{1to" << NumElts << "}"; - } else { - if (Desc.TSFlags & X86II::EVEX_L2) - printzmmwordmem(MI, CurOp--, OS); - else if (Desc.TSFlags & X86II::VEX_L) - printymmwordmem(MI, CurOp--, OS); - else - printxmmwordmem(MI, CurOp--, OS); - } - } else { - printOperand(MI, CurOp--, OS); - } - - OS << ", "; - printOperand(MI, CurOp--, OS); - OS << ", "; - printOperand(MI, 0, OS); - if (CurOp > 0) { - // Print mask operand. - OS << " {"; - printOperand(MI, CurOp--, OS); - OS << "}"; - } - - return true; - } - break; - } - - return false; -} - -void X86ATTInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, - raw_ostream &O) { - const MCOperand &Op = MI->getOperand(OpNo); - if (Op.isReg()) { - printRegName(O, Op.getReg()); - } else if (Op.isImm()) { - // Print immediates as signed values. - int64_t Imm = Op.getImm(); - O << markup("<imm:") << '$' << formatImm(Imm) << markup(">"); - - // TODO: This should be in a helper function in the base class, so it can - // be used by other printers. - - // If there are no instruction-specific comments, add a comment clarifying - // the hex value of the immediate operand when it isn't in the range - // [-256,255]. - if (CommentStream && !HasCustomInstComment && (Imm > 255 || Imm < -256)) { - // Don't print unnecessary hex sign bits. - if (Imm == (int16_t)(Imm)) - *CommentStream << format("imm = 0x%" PRIX16 "\n", (uint16_t)Imm); - else if (Imm == (int32_t)(Imm)) - *CommentStream << format("imm = 0x%" PRIX32 "\n", (uint32_t)Imm); - else - *CommentStream << format("imm = 0x%" PRIX64 "\n", (uint64_t)Imm); - } - } else { - assert(Op.isExpr() && "unknown operand kind in printOperand"); - O << markup("<imm:") << '$'; - Op.getExpr()->print(O, &MAI); - O << markup(">"); - } -} - -void X86ATTInstPrinter::printMemReference(const MCInst *MI, unsigned Op, - raw_ostream &O) { - const MCOperand &BaseReg = MI->getOperand(Op + X86::AddrBaseReg); - const MCOperand &IndexReg = MI->getOperand(Op + X86::AddrIndexReg); - const MCOperand &DispSpec = MI->getOperand(Op + X86::AddrDisp); - - O << markup("<mem:"); - - // If this has a segment register, print it. - printOptionalSegReg(MI, Op + X86::AddrSegmentReg, O); - - if (DispSpec.isImm()) { - int64_t DispVal = DispSpec.getImm(); - if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg())) - O << formatImm(DispVal); - } else { - assert(DispSpec.isExpr() && "non-immediate displacement for LEA?"); - DispSpec.getExpr()->print(O, &MAI); - } - - if (IndexReg.getReg() || BaseReg.getReg()) { - O << '('; - if (BaseReg.getReg()) - printOperand(MI, Op + X86::AddrBaseReg, O); - - if (IndexReg.getReg()) { - O << ','; - printOperand(MI, Op + X86::AddrIndexReg, O); - unsigned ScaleVal = MI->getOperand(Op + X86::AddrScaleAmt).getImm(); - if (ScaleVal != 1) { - O << ',' << markup("<imm:") << ScaleVal // never printed in hex. - << markup(">"); - } - } - O << ')'; - } - - O << markup(">"); -} - -void X86ATTInstPrinter::printSrcIdx(const MCInst *MI, unsigned Op, - raw_ostream &O) { - O << markup("<mem:"); - - // If this has a segment register, print it. - printOptionalSegReg(MI, Op + 1, O); - - O << "("; - printOperand(MI, Op, O); - O << ")"; - - O << markup(">"); -} - -void X86ATTInstPrinter::printDstIdx(const MCInst *MI, unsigned Op, - raw_ostream &O) { - O << markup("<mem:"); - - O << "%es:("; - printOperand(MI, Op, O); - O << ")"; - - O << markup(">"); -} - -void X86ATTInstPrinter::printMemOffset(const MCInst *MI, unsigned Op, - raw_ostream &O) { - const MCOperand &DispSpec = MI->getOperand(Op); - - O << markup("<mem:"); - - // If this has a segment register, print it. - printOptionalSegReg(MI, Op + 1, O); - - if (DispSpec.isImm()) { - O << formatImm(DispSpec.getImm()); - } else { - assert(DispSpec.isExpr() && "non-immediate displacement?"); - DispSpec.getExpr()->print(O, &MAI); - } - - O << markup(">"); -} - -void X86ATTInstPrinter::printU8Imm(const MCInst *MI, unsigned Op, - raw_ostream &O) { - if (MI->getOperand(Op).isExpr()) - return printOperand(MI, Op, O); - - O << markup("<imm:") << '$' << formatImm(MI->getOperand(Op).getImm() & 0xff) - << markup(">"); -} - -void X86ATTInstPrinter::printSTiRegOperand(const MCInst *MI, unsigned OpNo, - raw_ostream &OS) { - const MCOperand &Op = MI->getOperand(OpNo); - unsigned Reg = Op.getReg(); - // Override the default printing to print st(0) instead st. - if (Reg == X86::ST0) - OS << markup("<reg:") << "%st(0)" << markup(">"); - else - printRegName(OS, Reg); -} diff --git a/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.h b/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.h deleted file mode 100644 index ff4e8babc57..00000000000 --- a/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.h +++ /dev/null @@ -1,124 +0,0 @@ -//=- X86ATTInstPrinter.h - Convert X86 MCInst to assembly syntax --*- C++ -*-=// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// -// -// This class prints an X86 MCInst to AT&T style .s file syntax. -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_LIB_TARGET_X86_INSTPRINTER_X86ATTINSTPRINTER_H -#define LLVM_LIB_TARGET_X86_INSTPRINTER_X86ATTINSTPRINTER_H - -#include "X86InstPrinterCommon.h" - -namespace llvm { - -class X86ATTInstPrinter final : public X86InstPrinterCommon { -public: - X86ATTInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, - const MCRegisterInfo &MRI) - : X86InstPrinterCommon(MAI, MII, MRI), HasCustomInstComment(false) {} - - void printRegName(raw_ostream &OS, unsigned RegNo) const override; - void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot, - const MCSubtargetInfo &STI) override; - bool printVecCompareInstr(const MCInst *MI, raw_ostream &OS); - - // Autogenerated by tblgen, returns true if we successfully printed an - // alias. - bool printAliasInstr(const MCInst *MI, raw_ostream &OS); - void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx, - unsigned PrintMethodIdx, raw_ostream &O); - - // Autogenerated by tblgen. - void printInstruction(const MCInst *MI, raw_ostream &OS); - static const char *getRegisterName(unsigned RegNo); - - void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &OS) override; - void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &OS); - void printMemOffset(const MCInst *MI, unsigned OpNo, raw_ostream &OS); - void printSrcIdx(const MCInst *MI, unsigned Op, raw_ostream &O); - void printDstIdx(const MCInst *MI, unsigned Op, raw_ostream &O); - void printU8Imm(const MCInst *MI, unsigned Op, raw_ostream &OS); - void printSTiRegOperand(const MCInst *MI, unsigned OpNo, raw_ostream &OS); - - void printanymem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printMemReference(MI, OpNo, O); - } - void printopaquemem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printMemReference(MI, OpNo, O); - } - - void printbytemem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printMemReference(MI, OpNo, O); - } - void printwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printMemReference(MI, OpNo, O); - } - void printdwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printMemReference(MI, OpNo, O); - } - void printqwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printMemReference(MI, OpNo, O); - } - void printxmmwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printMemReference(MI, OpNo, O); - } - void printymmwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printMemReference(MI, OpNo, O); - } - void printzmmwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printMemReference(MI, OpNo, O); - } - void printtbytemem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printMemReference(MI, OpNo, O); - } - - void printSrcIdx8(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printSrcIdx(MI, OpNo, O); - } - void printSrcIdx16(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printSrcIdx(MI, OpNo, O); - } - void printSrcIdx32(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printSrcIdx(MI, OpNo, O); - } - void printSrcIdx64(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printSrcIdx(MI, OpNo, O); - } - void printDstIdx8(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printDstIdx(MI, OpNo, O); - } - void printDstIdx16(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printDstIdx(MI, OpNo, O); - } - void printDstIdx32(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printDstIdx(MI, OpNo, O); - } - void printDstIdx64(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printDstIdx(MI, OpNo, O); - } - void printMemOffs8(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printMemOffset(MI, OpNo, O); - } - void printMemOffs16(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printMemOffset(MI, OpNo, O); - } - void printMemOffs32(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printMemOffset(MI, OpNo, O); - } - void printMemOffs64(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printMemOffset(MI, OpNo, O); - } - -private: - bool HasCustomInstComment; -}; - -} // end namespace llvm - -#endif // LLVM_LIB_TARGET_X86_INSTPRINTER_X86ATTINSTPRINTER_H diff --git a/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp b/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp deleted file mode 100644 index a6d07c1c5be..00000000000 --- a/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp +++ /dev/null @@ -1,1310 +0,0 @@ -//===-- X86InstComments.cpp - Generate verbose-asm comments for instrs ----===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// -// -// This defines functionality used to emit comments about X86 instructions to -// an output stream for -fverbose-asm. -// -//===----------------------------------------------------------------------===// - -#include "X86InstComments.h" -#include "X86ATTInstPrinter.h" -#include "MCTargetDesc/X86BaseInfo.h" -#include "MCTargetDesc/X86MCTargetDesc.h" -#include "Utils/X86ShuffleDecode.h" -#include "llvm/MC/MCInst.h" -#include "llvm/MC/MCInstrInfo.h" -#include "llvm/Support/raw_ostream.h" - -using namespace llvm; - -#define CASE_SSE_INS_COMMON(Inst, src) \ - case X86::Inst##src: - -#define CASE_AVX_INS_COMMON(Inst, Suffix, src) \ - case X86::V##Inst##Suffix##src: - -#define CASE_MASK_INS_COMMON(Inst, Suffix, src) \ - case X86::V##Inst##Suffix##src##k: - -#define CASE_MASKZ_INS_COMMON(Inst, Suffix, src) \ - case X86::V##Inst##Suffix##src##kz: - -#define CASE_AVX512_INS_COMMON(Inst, Suffix, src) \ - CASE_AVX_INS_COMMON(Inst, Suffix, src) \ - CASE_MASK_INS_COMMON(Inst, Suffix, src) \ - CASE_MASKZ_INS_COMMON(Inst, Suffix, src) - -#define CASE_MOVDUP(Inst, src) \ - CASE_AVX512_INS_COMMON(Inst, Z, r##src) \ - CASE_AVX512_INS_COMMON(Inst, Z256, r##src) \ - CASE_AVX512_INS_COMMON(Inst, Z128, r##src) \ - CASE_AVX_INS_COMMON(Inst, , r##src) \ - CASE_AVX_INS_COMMON(Inst, Y, r##src) \ - CASE_SSE_INS_COMMON(Inst, r##src) - -#define CASE_MASK_MOVDUP(Inst, src) \ - CASE_MASK_INS_COMMON(Inst, Z, r##src) \ - CASE_MASK_INS_COMMON(Inst, Z256, r##src) \ - CASE_MASK_INS_COMMON(Inst, Z128, r##src) - -#define CASE_MASKZ_MOVDUP(Inst, src) \ - CASE_MASKZ_INS_COMMON(Inst, Z, r##src) \ - CASE_MASKZ_INS_COMMON(Inst, Z256, r##src) \ - CASE_MASKZ_INS_COMMON(Inst, Z128, r##src) - -#define CASE_PMOVZX(Inst, src) \ - CASE_AVX512_INS_COMMON(Inst, Z, r##src) \ - CASE_AVX512_INS_COMMON(Inst, Z256, r##src) \ - CASE_AVX512_INS_COMMON(Inst, Z128, r##src) \ - CASE_AVX_INS_COMMON(Inst, , r##src) \ - CASE_AVX_INS_COMMON(Inst, Y, r##src) \ - CASE_SSE_INS_COMMON(Inst, r##src) - -#define CASE_MASK_PMOVZX(Inst, src) \ - CASE_MASK_INS_COMMON(Inst, Z, r##src) \ - CASE_MASK_INS_COMMON(Inst, Z256, r##src) \ - CASE_MASK_INS_COMMON(Inst, Z128, r##src) - -#define CASE_MASKZ_PMOVZX(Inst, src) \ - CASE_MASKZ_INS_COMMON(Inst, Z, r##src) \ - CASE_MASKZ_INS_COMMON(Inst, Z256, r##src) \ - CASE_MASKZ_INS_COMMON(Inst, Z128, r##src) - -#define CASE_UNPCK(Inst, src) \ - CASE_AVX512_INS_COMMON(Inst, Z, r##src) \ - CASE_AVX512_INS_COMMON(Inst, Z256, r##src) \ - CASE_AVX512_INS_COMMON(Inst, Z128, r##src) \ - CASE_AVX_INS_COMMON(Inst, , r##src) \ - CASE_AVX_INS_COMMON(Inst, Y, r##src) \ - CASE_SSE_INS_COMMON(Inst, r##src) - -#define CASE_MASK_UNPCK(Inst, src) \ - CASE_MASK_INS_COMMON(Inst, Z, r##src) \ - CASE_MASK_INS_COMMON(Inst, Z256, r##src) \ - CASE_MASK_INS_COMMON(Inst, Z128, r##src) - -#define CASE_MASKZ_UNPCK(Inst, src) \ - CASE_MASKZ_INS_COMMON(Inst, Z, r##src) \ - CASE_MASKZ_INS_COMMON(Inst, Z256, r##src) \ - CASE_MASKZ_INS_COMMON(Inst, Z128, r##src) - -#define CASE_SHUF(Inst, suf) \ - CASE_AVX512_INS_COMMON(Inst, Z, suf) \ - CASE_AVX512_INS_COMMON(Inst, Z256, suf) \ - CASE_AVX512_INS_COMMON(Inst, Z128, suf) \ - CASE_AVX_INS_COMMON(Inst, , suf) \ - CASE_AVX_INS_COMMON(Inst, Y, suf) \ - CASE_SSE_INS_COMMON(Inst, suf) - -#define CASE_MASK_SHUF(Inst, src) \ - CASE_MASK_INS_COMMON(Inst, Z, r##src##i) \ - CASE_MASK_INS_COMMON(Inst, Z256, r##src##i) \ - CASE_MASK_INS_COMMON(Inst, Z128, r##src##i) - -#define CASE_MASKZ_SHUF(Inst, src) \ - CASE_MASKZ_INS_COMMON(Inst, Z, r##src##i) \ - CASE_MASKZ_INS_COMMON(Inst, Z256, r##src##i) \ - CASE_MASKZ_INS_COMMON(Inst, Z128, r##src##i) - -#define CASE_VPERMILPI(Inst, src) \ - CASE_AVX512_INS_COMMON(Inst, Z, src##i) \ - CASE_AVX512_INS_COMMON(Inst, Z256, src##i) \ - CASE_AVX512_INS_COMMON(Inst, Z128, src##i) \ - CASE_AVX_INS_COMMON(Inst, , src##i) \ - CASE_AVX_INS_COMMON(Inst, Y, src##i) - -#define CASE_MASK_VPERMILPI(Inst, src) \ - CASE_MASK_INS_COMMON(Inst, Z, src##i) \ - CASE_MASK_INS_COMMON(Inst, Z256, src##i) \ - CASE_MASK_INS_COMMON(Inst, Z128, src##i) - -#define CASE_MASKZ_VPERMILPI(Inst, src) \ - CASE_MASKZ_INS_COMMON(Inst, Z, src##i) \ - CASE_MASKZ_INS_COMMON(Inst, Z256, src##i) \ - CASE_MASKZ_INS_COMMON(Inst, Z128, src##i) - -#define CASE_VPERM(Inst, src) \ - CASE_AVX512_INS_COMMON(Inst, Z, src##i) \ - CASE_AVX512_INS_COMMON(Inst, Z256, src##i) \ - CASE_AVX_INS_COMMON(Inst, Y, src##i) - -#define CASE_MASK_VPERM(Inst, src) \ - CASE_MASK_INS_COMMON(Inst, Z, src##i) \ - CASE_MASK_INS_COMMON(Inst, Z256, src##i) - -#define CASE_MASKZ_VPERM(Inst, src) \ - CASE_MASKZ_INS_COMMON(Inst, Z, src##i) \ - CASE_MASKZ_INS_COMMON(Inst, Z256, src##i) - -#define CASE_VSHUF(Inst, src) \ - CASE_AVX512_INS_COMMON(SHUFF##Inst, Z, r##src##i) \ - CASE_AVX512_INS_COMMON(SHUFI##Inst, Z, r##src##i) \ - CASE_AVX512_INS_COMMON(SHUFF##Inst, Z256, r##src##i) \ - CASE_AVX512_INS_COMMON(SHUFI##Inst, Z256, r##src##i) - -#define CASE_MASK_VSHUF(Inst, src) \ - CASE_MASK_INS_COMMON(SHUFF##Inst, Z, r##src##i) \ - CASE_MASK_INS_COMMON(SHUFI##Inst, Z, r##src##i) \ - CASE_MASK_INS_COMMON(SHUFF##Inst, Z256, r##src##i) \ - CASE_MASK_INS_COMMON(SHUFI##Inst, Z256, r##src##i) - -#define CASE_MASKZ_VSHUF(Inst, src) \ - CASE_MASKZ_INS_COMMON(SHUFF##Inst, Z, r##src##i) \ - CASE_MASKZ_INS_COMMON(SHUFI##Inst, Z, r##src##i) \ - CASE_MASKZ_INS_COMMON(SHUFF##Inst, Z256, r##src##i) \ - CASE_MASKZ_INS_COMMON(SHUFI##Inst, Z256, r##src##i) - -#define CASE_AVX512_FMA(Inst, suf) \ - CASE_AVX512_INS_COMMON(Inst, Z, suf) \ - CASE_AVX512_INS_COMMON(Inst, Z256, suf) \ - CASE_AVX512_INS_COMMON(Inst, Z128, suf) - -#define CASE_FMA(Inst, suf) \ - CASE_AVX512_FMA(Inst, suf) \ - CASE_AVX_INS_COMMON(Inst, , suf) \ - CASE_AVX_INS_COMMON(Inst, Y, suf) - -#define CASE_FMA_PACKED_REG(Inst) \ - CASE_FMA(Inst##PD, r) \ - CASE_FMA(Inst##PS, r) - -#define CASE_FMA_PACKED_MEM(Inst) \ - CASE_FMA(Inst##PD, m) \ - CASE_FMA(Inst##PS, m) \ - CASE_AVX512_FMA(Inst##PD, mb) \ - CASE_AVX512_FMA(Inst##PS, mb) - -#define CASE_FMA_SCALAR_REG(Inst) \ - CASE_AVX_INS_COMMON(Inst##SD, , r) \ - CASE_AVX_INS_COMMON(Inst##SS, , r) \ - CASE_AVX_INS_COMMON(Inst##SD, , r_Int) \ - CASE_AVX_INS_COMMON(Inst##SS, , r_Int) \ - CASE_AVX_INS_COMMON(Inst##SD, Z, r) \ - CASE_AVX_INS_COMMON(Inst##SS, Z, r) \ - CASE_AVX512_INS_COMMON(Inst##SD, Z, r_Int) \ - CASE_AVX512_INS_COMMON(Inst##SS, Z, r_Int) - -#define CASE_FMA_SCALAR_MEM(Inst) \ - CASE_AVX_INS_COMMON(Inst##SD, , m) \ - CASE_AVX_INS_COMMON(Inst##SS, , m) \ - CASE_AVX_INS_COMMON(Inst##SD, , m_Int) \ - CASE_AVX_INS_COMMON(Inst##SS, , m_Int) \ - CASE_AVX_INS_COMMON(Inst##SD, Z, m) \ - CASE_AVX_INS_COMMON(Inst##SS, Z, m) \ - CASE_AVX512_INS_COMMON(Inst##SD, Z, m_Int) \ - CASE_AVX512_INS_COMMON(Inst##SS, Z, m_Int) - -static unsigned getVectorRegSize(unsigned RegNo) { - if (X86::ZMM0 <= RegNo && RegNo <= X86::ZMM31) - return 512; - if (X86::YMM0 <= RegNo && RegNo <= X86::YMM31) - return 256; - if (X86::XMM0 <= RegNo && RegNo <= X86::XMM31) - return 128; - if (X86::MM0 <= RegNo && RegNo <= X86::MM7) - return 64; - - llvm_unreachable("Unknown vector reg!"); -} - -static unsigned getRegOperandNumElts(const MCInst *MI, unsigned ScalarSize, - unsigned OperandIndex) { - unsigned OpReg = MI->getOperand(OperandIndex).getReg(); - return getVectorRegSize(OpReg) / ScalarSize; -} - -static const char *getRegName(unsigned Reg) { - return X86ATTInstPrinter::getRegisterName(Reg); -} - -/// Wraps the destination register name with AVX512 mask/maskz filtering. -static void printMasking(raw_ostream &OS, const MCInst *MI, - const MCInstrInfo &MCII) { - const MCInstrDesc &Desc = MCII.get(MI->getOpcode()); - uint64_t TSFlags = Desc.TSFlags; - - if (!(TSFlags & X86II::EVEX_K)) - return; - - bool MaskWithZero = (TSFlags & X86II::EVEX_Z); - unsigned MaskOp = Desc.getNumDefs(); - - if (Desc.getOperandConstraint(MaskOp, MCOI::TIED_TO) != -1) - ++MaskOp; - - const char *MaskRegName = getRegName(MI->getOperand(MaskOp).getReg()); - - // MASK: zmmX {%kY} - OS << " {%" << MaskRegName << "}"; - - // MASKZ: zmmX {%kY} {z} - if (MaskWithZero) - OS << " {z}"; -} - -static bool printFMA3Comments(const MCInst *MI, raw_ostream &OS) { - const char *Mul1Name = nullptr, *Mul2Name = nullptr, *AccName = nullptr; - unsigned NumOperands = MI->getNumOperands(); - bool RegForm = false; - bool Negate = false; - StringRef AccStr = "+"; - - // The operands for FMA instructions without rounding fall into two forms. - // dest, src1, src2, src3 - // dest, src1, mask, src2, src3 - // Where src3 is either a register or 5 memory address operands. So to find - // dest and src1 we can index from the front. To find src2 and src3 we can - // index from the end by taking into account memory vs register form when - // finding src2. - - switch (MI->getOpcode()) { - default: - return false; - CASE_FMA_PACKED_REG(FMADD132) - CASE_FMA_SCALAR_REG(FMADD132) - Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - CASE_FMA_PACKED_MEM(FMADD132) - CASE_FMA_SCALAR_MEM(FMADD132) - AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - Mul1Name = getRegName(MI->getOperand(1).getReg()); - break; - - CASE_FMA_PACKED_REG(FMADD213) - CASE_FMA_SCALAR_REG(FMADD213) - AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - CASE_FMA_PACKED_MEM(FMADD213) - CASE_FMA_SCALAR_MEM(FMADD213) - Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - Mul2Name = getRegName(MI->getOperand(1).getReg()); - break; - - CASE_FMA_PACKED_REG(FMADD231) - CASE_FMA_SCALAR_REG(FMADD231) - Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - CASE_FMA_PACKED_MEM(FMADD231) - CASE_FMA_SCALAR_MEM(FMADD231) - Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - AccName = getRegName(MI->getOperand(1).getReg()); - break; - - CASE_FMA_PACKED_REG(FMSUB132) - CASE_FMA_SCALAR_REG(FMSUB132) - Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - CASE_FMA_PACKED_MEM(FMSUB132) - CASE_FMA_SCALAR_MEM(FMSUB132) - AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - Mul1Name = getRegName(MI->getOperand(1).getReg()); - AccStr = "-"; - break; - - CASE_FMA_PACKED_REG(FMSUB213) - CASE_FMA_SCALAR_REG(FMSUB213) - AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - CASE_FMA_PACKED_MEM(FMSUB213) - CASE_FMA_SCALAR_MEM(FMSUB213) - Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - Mul2Name = getRegName(MI->getOperand(1).getReg()); - AccStr = "-"; - break; - - CASE_FMA_PACKED_REG(FMSUB231) - CASE_FMA_SCALAR_REG(FMSUB231) - Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - CASE_FMA_PACKED_MEM(FMSUB231) - CASE_FMA_SCALAR_MEM(FMSUB231) - Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - AccName = getRegName(MI->getOperand(1).getReg()); - AccStr = "-"; - break; - - CASE_FMA_PACKED_REG(FNMADD132) - CASE_FMA_SCALAR_REG(FNMADD132) - Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - CASE_FMA_PACKED_MEM(FNMADD132) - CASE_FMA_SCALAR_MEM(FNMADD132) - AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - Mul1Name = getRegName(MI->getOperand(1).getReg()); - Negate = true; - break; - - CASE_FMA_PACKED_REG(FNMADD213) - CASE_FMA_SCALAR_REG(FNMADD213) - AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - CASE_FMA_PACKED_MEM(FNMADD213) - CASE_FMA_SCALAR_MEM(FNMADD213) - Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - Mul2Name = getRegName(MI->getOperand(1).getReg()); - Negate = true; - break; - - CASE_FMA_PACKED_REG(FNMADD231) - CASE_FMA_SCALAR_REG(FNMADD231) - Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - CASE_FMA_PACKED_MEM(FNMADD231) - CASE_FMA_SCALAR_MEM(FNMADD231) - Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - AccName = getRegName(MI->getOperand(1).getReg()); - Negate = true; - break; - - CASE_FMA_PACKED_REG(FNMSUB132) - CASE_FMA_SCALAR_REG(FNMSUB132) - Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - CASE_FMA_PACKED_MEM(FNMSUB132) - CASE_FMA_SCALAR_MEM(FNMSUB132) - AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - Mul1Name = getRegName(MI->getOperand(1).getReg()); - AccStr = "-"; - Negate = true; - break; - - CASE_FMA_PACKED_REG(FNMSUB213) - CASE_FMA_SCALAR_REG(FNMSUB213) - AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - CASE_FMA_PACKED_MEM(FNMSUB213) - CASE_FMA_SCALAR_MEM(FNMSUB213) - Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - Mul2Name = getRegName(MI->getOperand(1).getReg()); - AccStr = "-"; - Negate = true; - break; - - CASE_FMA_PACKED_REG(FNMSUB231) - CASE_FMA_SCALAR_REG(FNMSUB231) - Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - CASE_FMA_PACKED_MEM(FNMSUB231) - CASE_FMA_SCALAR_MEM(FNMSUB231) - Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - AccName = getRegName(MI->getOperand(1).getReg()); - AccStr = "-"; - Negate = true; - break; - - CASE_FMA_PACKED_REG(FMADDSUB132) - Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - CASE_FMA_PACKED_MEM(FMADDSUB132) - AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - Mul1Name = getRegName(MI->getOperand(1).getReg()); - AccStr = "+/-"; - break; - - CASE_FMA_PACKED_REG(FMADDSUB213) - AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - CASE_FMA_PACKED_MEM(FMADDSUB213) - Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - Mul2Name = getRegName(MI->getOperand(1).getReg()); - AccStr = "+/-"; - break; - - CASE_FMA_PACKED_REG(FMADDSUB231) - Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - CASE_FMA_PACKED_MEM(FMADDSUB231) - Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - AccName = getRegName(MI->getOperand(1).getReg()); - AccStr = "+/-"; - break; - - CASE_FMA_PACKED_REG(FMSUBADD132) - Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - CASE_FMA_PACKED_MEM(FMSUBADD132) - AccName = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - Mul1Name = getRegName(MI->getOperand(1).getReg()); - AccStr = "-/+"; - break; - - CASE_FMA_PACKED_REG(FMSUBADD213) - AccName = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - CASE_FMA_PACKED_MEM(FMSUBADD213) - Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - Mul2Name = getRegName(MI->getOperand(1).getReg()); - AccStr = "-/+"; - break; - - CASE_FMA_PACKED_REG(FMSUBADD231) - Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - CASE_FMA_PACKED_MEM(FMSUBADD231) - Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - AccName = getRegName(MI->getOperand(1).getReg()); - AccStr = "-/+"; - break; - } - - const char *DestName = getRegName(MI->getOperand(0).getReg()); - - if (!Mul1Name) Mul1Name = "mem"; - if (!Mul2Name) Mul2Name = "mem"; - if (!AccName) AccName = "mem"; - - OS << DestName << " = "; - // TODO: Print masking information? - - if (Negate) - OS << '-'; - - OS << '(' << Mul1Name << " * " << Mul2Name << ") " << AccStr << ' ' - << AccName; - - return true; -} - - -//===----------------------------------------------------------------------===// -// Top Level Entrypoint -//===----------------------------------------------------------------------===// - -/// EmitAnyX86InstComments - This function decodes x86 instructions and prints -/// newline terminated strings to the specified string if desired. This -/// information is shown in disassembly dumps when verbose assembly is enabled. -bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, - const MCInstrInfo &MCII) { - // If this is a shuffle operation, the switch should fill in this state. - SmallVector<int, 8> ShuffleMask; - const char *DestName = nullptr, *Src1Name = nullptr, *Src2Name = nullptr; - unsigned NumOperands = MI->getNumOperands(); - bool RegForm = false; - - if (printFMA3Comments(MI, OS)) - return true; - - switch (MI->getOpcode()) { - default: - // Not an instruction for which we can decode comments. - return false; - - case X86::BLENDPDrri: - case X86::VBLENDPDrri: - case X86::VBLENDPDYrri: - Src2Name = getRegName(MI->getOperand(2).getReg()); - LLVM_FALLTHROUGH; - case X86::BLENDPDrmi: - case X86::VBLENDPDrmi: - case X86::VBLENDPDYrmi: - if (MI->getOperand(NumOperands - 1).isImm()) - DecodeBLENDMask(getRegOperandNumElts(MI, 64, 0), - MI->getOperand(NumOperands - 1).getImm(), - ShuffleMask); - Src1Name = getRegName(MI->getOperand(1).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - case X86::BLENDPSrri: - case X86::VBLENDPSrri: - case X86::VBLENDPSYrri: - Src2Name = getRegName(MI->getOperand(2).getReg()); - LLVM_FALLTHROUGH; - case X86::BLENDPSrmi: - case X86::VBLENDPSrmi: - case X86::VBLENDPSYrmi: - if (MI->getOperand(NumOperands - 1).isImm()) - DecodeBLENDMask(getRegOperandNumElts(MI, 32, 0), - MI->getOperand(NumOperands - 1).getImm(), - ShuffleMask); - Src1Name = getRegName(MI->getOperand(1).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - case X86::PBLENDWrri: - case X86::VPBLENDWrri: - case X86::VPBLENDWYrri: - Src2Name = getRegName(MI->getOperand(2).getReg()); - LLVM_FALLTHROUGH; - case X86::PBLENDWrmi: - case X86::VPBLENDWrmi: - case X86::VPBLENDWYrmi: - if (MI->getOperand(NumOperands - 1).isImm()) - DecodeBLENDMask(getRegOperandNumElts(MI, 16, 0), - MI->getOperand(NumOperands - 1).getImm(), - ShuffleMask); - Src1Name = getRegName(MI->getOperand(1).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - case X86::VPBLENDDrri: - case X86::VPBLENDDYrri: - Src2Name = getRegName(MI->getOperand(2).getReg()); - LLVM_FALLTHROUGH; - case X86::VPBLENDDrmi: - case X86::VPBLENDDYrmi: - if (MI->getOperand(NumOperands - 1).isImm()) - DecodeBLENDMask(getRegOperandNumElts(MI, 32, 0), - MI->getOperand(NumOperands - 1).getImm(), - ShuffleMask); - Src1Name = getRegName(MI->getOperand(1).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - case X86::INSERTPSrr: - case X86::VINSERTPSrr: - case X86::VINSERTPSZrr: - Src2Name = getRegName(MI->getOperand(2).getReg()); - LLVM_FALLTHROUGH; - case X86::INSERTPSrm: - case X86::VINSERTPSrm: - case X86::VINSERTPSZrm: - DestName = getRegName(MI->getOperand(0).getReg()); - Src1Name = getRegName(MI->getOperand(1).getReg()); - if (MI->getOperand(NumOperands - 1).isImm()) - DecodeINSERTPSMask(MI->getOperand(NumOperands - 1).getImm(), - ShuffleMask); - break; - - case X86::MOVLHPSrr: - case X86::VMOVLHPSrr: - case X86::VMOVLHPSZrr: - Src2Name = getRegName(MI->getOperand(2).getReg()); - Src1Name = getRegName(MI->getOperand(1).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - DecodeMOVLHPSMask(2, ShuffleMask); - break; - - case X86::MOVHLPSrr: - case X86::VMOVHLPSrr: - case X86::VMOVHLPSZrr: - Src2Name = getRegName(MI->getOperand(2).getReg()); - Src1Name = getRegName(MI->getOperand(1).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - DecodeMOVHLPSMask(2, ShuffleMask); - break; - - case X86::MOVHPDrm: - case X86::VMOVHPDrm: - case X86::VMOVHPDZ128rm: - Src1Name = getRegName(MI->getOperand(1).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - DecodeInsertElementMask(2, 1, 1, ShuffleMask); - break; - - case X86::MOVHPSrm: - case X86::VMOVHPSrm: - case X86::VMOVHPSZ128rm: - Src1Name = getRegName(MI->getOperand(1).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - DecodeInsertElementMask(4, 2, 2, ShuffleMask); - break; - - case X86::MOVLPDrm: - case X86::VMOVLPDrm: - case X86::VMOVLPDZ128rm: - Src1Name = getRegName(MI->getOperand(1).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - DecodeInsertElementMask(2, 0, 1, ShuffleMask); - break; - - case X86::MOVLPSrm: - case X86::VMOVLPSrm: - case X86::VMOVLPSZ128rm: - Src1Name = getRegName(MI->getOperand(1).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - DecodeInsertElementMask(4, 0, 2, ShuffleMask); - break; - - CASE_MOVDUP(MOVSLDUP, r) - Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - LLVM_FALLTHROUGH; - - CASE_MOVDUP(MOVSLDUP, m) - DestName = getRegName(MI->getOperand(0).getReg()); - DecodeMOVSLDUPMask(getRegOperandNumElts(MI, 32, 0), ShuffleMask); - break; - - CASE_MOVDUP(MOVSHDUP, r) - Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - LLVM_FALLTHROUGH; - - CASE_MOVDUP(MOVSHDUP, m) - DestName = getRegName(MI->getOperand(0).getReg()); - DecodeMOVSHDUPMask(getRegOperandNumElts(MI, 32, 0), ShuffleMask); - break; - - CASE_MOVDUP(MOVDDUP, r) - Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - LLVM_FALLTHROUGH; - - CASE_MOVDUP(MOVDDUP, m) - DestName = getRegName(MI->getOperand(0).getReg()); - DecodeMOVDDUPMask(getRegOperandNumElts(MI, 64, 0), ShuffleMask); - break; - - case X86::PSLLDQri: - case X86::VPSLLDQri: - case X86::VPSLLDQYri: - case X86::VPSLLDQZ128rr: - case X86::VPSLLDQZ256rr: - case X86::VPSLLDQZrr: - Src1Name = getRegName(MI->getOperand(1).getReg()); - LLVM_FALLTHROUGH; - case X86::VPSLLDQZ128rm: - case X86::VPSLLDQZ256rm: - case X86::VPSLLDQZrm: - DestName = getRegName(MI->getOperand(0).getReg()); - if (MI->getOperand(NumOperands - 1).isImm()) - DecodePSLLDQMask(getRegOperandNumElts(MI, 8, 0), - MI->getOperand(NumOperands - 1).getImm(), - ShuffleMask); - break; - - case X86::PSRLDQri: - case X86::VPSRLDQri: - case X86::VPSRLDQYri: - case X86::VPSRLDQZ128rr: - case X86::VPSRLDQZ256rr: - case X86::VPSRLDQZrr: - Src1Name = getRegName(MI->getOperand(1).getReg()); - LLVM_FALLTHROUGH; - case X86::VPSRLDQZ128rm: - case X86::VPSRLDQZ256rm: - case X86::VPSRLDQZrm: - DestName = getRegName(MI->getOperand(0).getReg()); - if (MI->getOperand(NumOperands - 1).isImm()) - DecodePSRLDQMask(getRegOperandNumElts(MI, 8, 0), - MI->getOperand(NumOperands - 1).getImm(), - ShuffleMask); - break; - - CASE_SHUF(PALIGNR, rri) - Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - - CASE_SHUF(PALIGNR, rmi) - Src2Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - if (MI->getOperand(NumOperands - 1).isImm()) - DecodePALIGNRMask(getRegOperandNumElts(MI, 8, 0), - MI->getOperand(NumOperands - 1).getImm(), - ShuffleMask); - break; - - CASE_AVX512_INS_COMMON(ALIGNQ, Z, rri) - CASE_AVX512_INS_COMMON(ALIGNQ, Z256, rri) - CASE_AVX512_INS_COMMON(ALIGNQ, Z128, rri) - Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - - CASE_AVX512_INS_COMMON(ALIGNQ, Z, rmi) - CASE_AVX512_INS_COMMON(ALIGNQ, Z256, rmi) - CASE_AVX512_INS_COMMON(ALIGNQ, Z128, rmi) - Src2Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - if (MI->getOperand(NumOperands - 1).isImm()) - DecodeVALIGNMask(getRegOperandNumElts(MI, 64, 0), - MI->getOperand(NumOperands - 1).getImm(), - ShuffleMask); - break; - - CASE_AVX512_INS_COMMON(ALIGND, Z, rri) - CASE_AVX512_INS_COMMON(ALIGND, Z256, rri) - CASE_AVX512_INS_COMMON(ALIGND, Z128, rri) - Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - - CASE_AVX512_INS_COMMON(ALIGND, Z, rmi) - CASE_AVX512_INS_COMMON(ALIGND, Z256, rmi) - CASE_AVX512_INS_COMMON(ALIGND, Z128, rmi) - Src2Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - if (MI->getOperand(NumOperands - 1).isImm()) - DecodeVALIGNMask(getRegOperandNumElts(MI, 32, 0), - MI->getOperand(NumOperands - 1).getImm(), - ShuffleMask); - break; - - CASE_SHUF(PSHUFD, ri) - Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); - LLVM_FALLTHROUGH; - - CASE_SHUF(PSHUFD, mi) - DestName = getRegName(MI->getOperand(0).getReg()); - if (MI->getOperand(NumOperands - 1).isImm()) - DecodePSHUFMask(getRegOperandNumElts(MI, 32, 0), 32, - MI->getOperand(NumOperands - 1).getImm(), - ShuffleMask); - break; - - CASE_SHUF(PSHUFHW, ri) - Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); - LLVM_FALLTHROUGH; - - CASE_SHUF(PSHUFHW, mi) - DestName = getRegName(MI->getOperand(0).getReg()); - if (MI->getOperand(NumOperands - 1).isImm()) - DecodePSHUFHWMask(getRegOperandNumElts(MI, 16, 0), - MI->getOperand(NumOperands - 1).getImm(), - ShuffleMask); - break; - - CASE_SHUF(PSHUFLW, ri) - Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); - LLVM_FALLTHROUGH; - - CASE_SHUF(PSHUFLW, mi) - DestName = getRegName(MI->getOperand(0).getReg()); - if (MI->getOperand(NumOperands - 1).isImm()) - DecodePSHUFLWMask(getRegOperandNumElts(MI, 16, 0), - MI->getOperand(NumOperands - 1).getImm(), - ShuffleMask); - break; - - case X86::MMX_PSHUFWri: - Src1Name = getRegName(MI->getOperand(1).getReg()); - LLVM_FALLTHROUGH; - - case X86::MMX_PSHUFWmi: - DestName = getRegName(MI->getOperand(0).getReg()); - if (MI->getOperand(NumOperands - 1).isImm()) - DecodePSHUFMask(4, 16, MI->getOperand(NumOperands - 1).getImm(), - ShuffleMask); - break; - - case X86::PSWAPDrr: - Src1Name = getRegName(MI->getOperand(1).getReg()); - LLVM_FALLTHROUGH; - - case X86::PSWAPDrm: - DestName = getRegName(MI->getOperand(0).getReg()); - DecodePSWAPMask(2, ShuffleMask); - break; - - CASE_UNPCK(PUNPCKHBW, r) - case X86::MMX_PUNPCKHBWirr: - Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - - CASE_UNPCK(PUNPCKHBW, m) - case X86::MMX_PUNPCKHBWirm: - Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - DecodeUNPCKHMask(getRegOperandNumElts(MI, 8, 0), 8, ShuffleMask); - break; - - CASE_UNPCK(PUNPCKHWD, r) - case X86::MMX_PUNPCKHWDirr: - Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - - CASE_UNPCK(PUNPCKHWD, m) - case X86::MMX_PUNPCKHWDirm: - Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - DecodeUNPCKHMask(getRegOperandNumElts(MI, 16, 0), 16, ShuffleMask); - break; - - CASE_UNPCK(PUNPCKHDQ, r) - case X86::MMX_PUNPCKHDQirr: - Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - - CASE_UNPCK(PUNPCKHDQ, m) - case X86::MMX_PUNPCKHDQirm: - Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - DecodeUNPCKHMask(getRegOperandNumElts(MI, 32, 0), 32, ShuffleMask); - break; - - CASE_UNPCK(PUNPCKHQDQ, r) - Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - - CASE_UNPCK(PUNPCKHQDQ, m) - Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - DecodeUNPCKHMask(getRegOperandNumElts(MI, 64, 0), 64, ShuffleMask); - break; - - CASE_UNPCK(PUNPCKLBW, r) - case X86::MMX_PUNPCKLBWirr: - Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - - CASE_UNPCK(PUNPCKLBW, m) - case X86::MMX_PUNPCKLBWirm: - Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - DecodeUNPCKLMask(getRegOperandNumElts(MI, 8, 0), 8, ShuffleMask); - break; - - CASE_UNPCK(PUNPCKLWD, r) - case X86::MMX_PUNPCKLWDirr: - Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - - CASE_UNPCK(PUNPCKLWD, m) - case X86::MMX_PUNPCKLWDirm: - Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - DecodeUNPCKLMask(getRegOperandNumElts(MI, 16, 0), 16, ShuffleMask); - break; - - CASE_UNPCK(PUNPCKLDQ, r) - case X86::MMX_PUNPCKLDQirr: - Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - - CASE_UNPCK(PUNPCKLDQ, m) - case X86::MMX_PUNPCKLDQirm: - Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - DecodeUNPCKLMask(getRegOperandNumElts(MI, 32, 0), 32, ShuffleMask); - break; - - CASE_UNPCK(PUNPCKLQDQ, r) - Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - - CASE_UNPCK(PUNPCKLQDQ, m) - Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - DecodeUNPCKLMask(getRegOperandNumElts(MI, 64, 0), 64, ShuffleMask); - break; - - CASE_SHUF(SHUFPD, rri) - Src2Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - - CASE_SHUF(SHUFPD, rmi) - if (MI->getOperand(NumOperands - 1).isImm()) - DecodeSHUFPMask(getRegOperandNumElts(MI, 64, 0), 64, - MI->getOperand(NumOperands - 1).getImm(), ShuffleMask); - Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - CASE_SHUF(SHUFPS, rri) - Src2Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - - CASE_SHUF(SHUFPS, rmi) - if (MI->getOperand(NumOperands - 1).isImm()) - DecodeSHUFPMask(getRegOperandNumElts(MI, 32, 0), 32, - MI->getOperand(NumOperands - 1).getImm(), - ShuffleMask); - Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - CASE_VSHUF(64X2, r) - Src2Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - - CASE_VSHUF(64X2, m) - decodeVSHUF64x2FamilyMask(getRegOperandNumElts(MI, 64, 0), 64, - MI->getOperand(NumOperands - 1).getImm(), - ShuffleMask); - Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - CASE_VSHUF(32X4, r) - Src2Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - - CASE_VSHUF(32X4, m) - decodeVSHUF64x2FamilyMask(getRegOperandNumElts(MI, 32, 0), 32, - MI->getOperand(NumOperands - 1).getImm(), - ShuffleMask); - Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?3:7)).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - CASE_UNPCK(UNPCKLPD, r) - Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - - CASE_UNPCK(UNPCKLPD, m) - DecodeUNPCKLMask(getRegOperandNumElts(MI, 64, 0), 64, ShuffleMask); - Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - CASE_UNPCK(UNPCKLPS, r) - Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - - CASE_UNPCK(UNPCKLPS, m) - DecodeUNPCKLMask(getRegOperandNumElts(MI, 32, 0), 32, ShuffleMask); - Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - CASE_UNPCK(UNPCKHPD, r) - Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - - CASE_UNPCK(UNPCKHPD, m) - DecodeUNPCKHMask(getRegOperandNumElts(MI, 64, 0), 64, ShuffleMask); - Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - CASE_UNPCK(UNPCKHPS, r) - Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - RegForm = true; - LLVM_FALLTHROUGH; - - CASE_UNPCK(UNPCKHPS, m) - DecodeUNPCKHMask(getRegOperandNumElts(MI, 32, 0), 32, ShuffleMask); - Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?2:6)).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - CASE_VPERMILPI(PERMILPS, r) - Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); - LLVM_FALLTHROUGH; - - CASE_VPERMILPI(PERMILPS, m) - if (MI->getOperand(NumOperands - 1).isImm()) - DecodePSHUFMask(getRegOperandNumElts(MI, 32, 0), 32, - MI->getOperand(NumOperands - 1).getImm(), - ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - CASE_VPERMILPI(PERMILPD, r) - Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); - LLVM_FALLTHROUGH; - - CASE_VPERMILPI(PERMILPD, m) - if (MI->getOperand(NumOperands - 1).isImm()) - DecodePSHUFMask(getRegOperandNumElts(MI, 64, 0), 64, - MI->getOperand(NumOperands - 1).getImm(), - ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - case X86::VPERM2F128rr: - case X86::VPERM2I128rr: - Src2Name = getRegName(MI->getOperand(2).getReg()); - LLVM_FALLTHROUGH; - - case X86::VPERM2F128rm: - case X86::VPERM2I128rm: - // For instruction comments purpose, assume the 256-bit vector is v4i64. - if (MI->getOperand(NumOperands - 1).isImm()) - DecodeVPERM2X128Mask(4, MI->getOperand(NumOperands - 1).getImm(), - ShuffleMask); - Src1Name = getRegName(MI->getOperand(1).getReg()); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - CASE_VPERM(PERMPD, r) - Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); - LLVM_FALLTHROUGH; - - CASE_VPERM(PERMPD, m) - if (MI->getOperand(NumOperands - 1).isImm()) - DecodeVPERMMask(getRegOperandNumElts(MI, 64, 0), - MI->getOperand(NumOperands - 1).getImm(), - ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - CASE_VPERM(PERMQ, r) - Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); - LLVM_FALLTHROUGH; - - CASE_VPERM(PERMQ, m) - if (MI->getOperand(NumOperands - 1).isImm()) - DecodeVPERMMask(getRegOperandNumElts(MI, 64, 0), - MI->getOperand(NumOperands - 1).getImm(), - ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - case X86::MOVSDrr: - case X86::VMOVSDrr: - case X86::VMOVSDZrr: - Src2Name = getRegName(MI->getOperand(2).getReg()); - Src1Name = getRegName(MI->getOperand(1).getReg()); - LLVM_FALLTHROUGH; - - case X86::MOVSDrm: - case X86::VMOVSDrm: - case X86::VMOVSDZrm: - DecodeScalarMoveMask(2, nullptr == Src2Name, ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - case X86::MOVSSrr: - case X86::VMOVSSrr: - case X86::VMOVSSZrr: - Src2Name = getRegName(MI->getOperand(2).getReg()); - Src1Name = getRegName(MI->getOperand(1).getReg()); - LLVM_FALLTHROUGH; - - case X86::MOVSSrm: - case X86::VMOVSSrm: - case X86::VMOVSSZrm: - DecodeScalarMoveMask(4, nullptr == Src2Name, ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - case X86::MOVPQI2QIrr: - case X86::MOVZPQILo2PQIrr: - case X86::VMOVPQI2QIrr: - case X86::VMOVPQI2QIZrr: - case X86::VMOVZPQILo2PQIrr: - case X86::VMOVZPQILo2PQIZrr: - Src1Name = getRegName(MI->getOperand(1).getReg()); - LLVM_FALLTHROUGH; - - case X86::MOVQI2PQIrm: - case X86::VMOVQI2PQIrm: - case X86::VMOVQI2PQIZrm: - DecodeZeroMoveLowMask(2, ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - case X86::MOVDI2PDIrm: - case X86::VMOVDI2PDIrm: - case X86::VMOVDI2PDIZrm: - DecodeZeroMoveLowMask(4, ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - case X86::EXTRQI: - if (MI->getOperand(2).isImm() && - MI->getOperand(3).isImm()) - DecodeEXTRQIMask(16, 8, MI->getOperand(2).getImm(), - MI->getOperand(3).getImm(), ShuffleMask); - - DestName = getRegName(MI->getOperand(0).getReg()); - Src1Name = getRegName(MI->getOperand(1).getReg()); - break; - - case X86::INSERTQI: - if (MI->getOperand(3).isImm() && - MI->getOperand(4).isImm()) - DecodeINSERTQIMask(16, 8, MI->getOperand(3).getImm(), - MI->getOperand(4).getImm(), ShuffleMask); - - DestName = getRegName(MI->getOperand(0).getReg()); - Src1Name = getRegName(MI->getOperand(1).getReg()); - Src2Name = getRegName(MI->getOperand(2).getReg()); - break; - - case X86::VBROADCASTF128: - case X86::VBROADCASTI128: - CASE_AVX512_INS_COMMON(BROADCASTF64X2, Z128, rm) - CASE_AVX512_INS_COMMON(BROADCASTI64X2, Z128, rm) - DecodeSubVectorBroadcast(4, 2, ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - CASE_AVX512_INS_COMMON(BROADCASTF64X2, , rm) - CASE_AVX512_INS_COMMON(BROADCASTI64X2, , rm) - DecodeSubVectorBroadcast(8, 2, ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - CASE_AVX512_INS_COMMON(BROADCASTF64X4, , rm) - CASE_AVX512_INS_COMMON(BROADCASTI64X4, , rm) - DecodeSubVectorBroadcast(8, 4, ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - CASE_AVX512_INS_COMMON(BROADCASTF32X4, Z256, rm) - CASE_AVX512_INS_COMMON(BROADCASTI32X4, Z256, rm) - DecodeSubVectorBroadcast(8, 4, ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - CASE_AVX512_INS_COMMON(BROADCASTF32X4, , rm) - CASE_AVX512_INS_COMMON(BROADCASTI32X4, , rm) - DecodeSubVectorBroadcast(16, 4, ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - CASE_AVX512_INS_COMMON(BROADCASTF32X8, , rm) - CASE_AVX512_INS_COMMON(BROADCASTI32X8, , rm) - DecodeSubVectorBroadcast(16, 8, ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z128, r) - Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - LLVM_FALLTHROUGH; - CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z128, m) - DecodeSubVectorBroadcast(4, 2, ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z256, r) - CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z256, r) - Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - LLVM_FALLTHROUGH; - CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z256, m) - CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z256, m) - DecodeSubVectorBroadcast(8, 2, ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z, r) - CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z, r) - Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - LLVM_FALLTHROUGH; - CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z, m) - CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z, m) - DecodeSubVectorBroadcast(16, 2, ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - CASE_PMOVZX(PMOVZXBW, r) - Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - LLVM_FALLTHROUGH; - CASE_PMOVZX(PMOVZXBW, m) - DecodeZeroExtendMask(8, 16, getRegOperandNumElts(MI, 16, 0), ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - CASE_PMOVZX(PMOVZXBD, r) - Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - LLVM_FALLTHROUGH; - CASE_PMOVZX(PMOVZXBD, m) - DecodeZeroExtendMask(8, 32, getRegOperandNumElts(MI, 32, 0), ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - CASE_PMOVZX(PMOVZXBQ, r) - Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - LLVM_FALLTHROUGH; - CASE_PMOVZX(PMOVZXBQ, m) - DecodeZeroExtendMask(8, 64, getRegOperandNumElts(MI, 64, 0), ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - CASE_PMOVZX(PMOVZXWD, r) - Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - LLVM_FALLTHROUGH; - CASE_PMOVZX(PMOVZXWD, m) - DecodeZeroExtendMask(16, 32, getRegOperandNumElts(MI, 32, 0), ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - CASE_PMOVZX(PMOVZXWQ, r) - Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - LLVM_FALLTHROUGH; - CASE_PMOVZX(PMOVZXWQ, m) - DecodeZeroExtendMask(16, 64, getRegOperandNumElts(MI, 64, 0), ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - - CASE_PMOVZX(PMOVZXDQ, r) - Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg()); - LLVM_FALLTHROUGH; - CASE_PMOVZX(PMOVZXDQ, m) - DecodeZeroExtendMask(32, 64, getRegOperandNumElts(MI, 64, 0), ShuffleMask); - DestName = getRegName(MI->getOperand(0).getReg()); - break; - } - - // The only comments we decode are shuffles, so give up if we were unable to - // decode a shuffle mask. - if (ShuffleMask.empty()) - return false; - - if (!DestName) DestName = Src1Name; - if (DestName) { - OS << DestName; - printMasking(OS, MI, MCII); - } else - OS << "mem"; - - OS << " = "; - - // If the two sources are the same, canonicalize the input elements to be - // from the first src so that we get larger element spans. - if (Src1Name == Src2Name) { - for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) { - if ((int)ShuffleMask[i] >= 0 && // Not sentinel. - ShuffleMask[i] >= (int)e) // From second mask. - ShuffleMask[i] -= e; - } - } - - // The shuffle mask specifies which elements of the src1/src2 fill in the - // destination, with a few sentinel values. Loop through and print them - // out. - for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) { - if (i != 0) - OS << ','; - if (ShuffleMask[i] == SM_SentinelZero) { - OS << "zero"; - continue; - } - - // Otherwise, it must come from src1 or src2. Print the span of elements - // that comes from this src. - bool isSrc1 = ShuffleMask[i] < (int)ShuffleMask.size(); - const char *SrcName = isSrc1 ? Src1Name : Src2Name; - OS << (SrcName ? SrcName : "mem") << '['; - bool IsFirst = true; - while (i != e && (int)ShuffleMask[i] != SM_SentinelZero && - (ShuffleMask[i] < (int)ShuffleMask.size()) == isSrc1) { - if (!IsFirst) - OS << ','; - else - IsFirst = false; - if (ShuffleMask[i] == SM_SentinelUndef) - OS << "u"; - else - OS << ShuffleMask[i] % ShuffleMask.size(); - ++i; - } - OS << ']'; - --i; // For loop increments element #. - } - OS << '\n'; - - // We successfully added a comment to this instruction. - return true; -} diff --git a/llvm/lib/Target/X86/InstPrinter/X86InstComments.h b/llvm/lib/Target/X86/InstPrinter/X86InstComments.h deleted file mode 100644 index 05f1683848a..00000000000 --- a/llvm/lib/Target/X86/InstPrinter/X86InstComments.h +++ /dev/null @@ -1,26 +0,0 @@ -//=- X86InstComments.h - Generate verbose-asm comments for instrs -*- C++ -*-=// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// -// -// This defines functionality used to emit comments about X86 instructions to -// an output stream for -fverbose-asm. -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_LIB_TARGET_X86_INSTPRINTER_X86INSTCOMMENTS_H -#define LLVM_LIB_TARGET_X86_INSTPRINTER_X86INSTCOMMENTS_H - -namespace llvm { - - class MCInst; - class MCInstrInfo; - class raw_ostream; - bool EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, - const MCInstrInfo &MCII); -} - -#endif diff --git a/llvm/lib/Target/X86/InstPrinter/X86InstPrinterCommon.cpp b/llvm/lib/Target/X86/InstPrinter/X86InstPrinterCommon.cpp deleted file mode 100644 index 85d0675154e..00000000000 --- a/llvm/lib/Target/X86/InstPrinter/X86InstPrinterCommon.cpp +++ /dev/null @@ -1,337 +0,0 @@ -//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// -// -// This file includes common code for rendering MCInst instances as Intel-style -// and Intel-style assembly. -// -//===----------------------------------------------------------------------===// - -#include "X86InstPrinterCommon.h" -#include "MCTargetDesc/X86BaseInfo.h" -#include "llvm/MC/MCExpr.h" -#include "llvm/MC/MCInst.h" -#include "llvm/MC/MCInstrDesc.h" -#include "llvm/MC/MCInstrInfo.h" -#include "llvm/Support/raw_ostream.h" -#include "llvm/Support/Casting.h" -#include <cstdint> -#include <cassert> - -using namespace llvm; - -void X86InstPrinterCommon::printCondCode(const MCInst *MI, unsigned Op, - raw_ostream &O) { - int64_t Imm = MI->getOperand(Op).getImm(); - switch (Imm) { - default: llvm_unreachable("Invalid condcode argument!"); - case 0: O << "o"; break; - case 1: O << "no"; break; - case 2: O << "b"; break; - case 3: O << "ae"; break; - case 4: O << "e"; break; - case 5: O << "ne"; break; - case 6: O << "be"; break; - case 7: O << "a"; break; - case 8: O << "s"; break; - case 9: O << "ns"; break; - case 0xa: O << "p"; break; - case 0xb: O << "np"; break; - case 0xc: O << "l"; break; - case 0xd: O << "ge"; break; - case 0xe: O << "le"; break; - case 0xf: O << "g"; break; - } -} - -void X86InstPrinterCommon::printSSEAVXCC(const MCInst *MI, unsigned Op, - raw_ostream &O) { - int64_t Imm = MI->getOperand(Op).getImm(); - switch (Imm) { - default: llvm_unreachable("Invalid ssecc/avxcc argument!"); - case 0: O << "eq"; break; - case 1: O << "lt"; break; - case 2: O << "le"; break; - case 3: O << "unord"; break; - case 4: O << "neq"; break; - case 5: O << "nlt"; break; - case 6: O << "nle"; break; - case 7: O << "ord"; break; - case 8: O << "eq_uq"; break; - case 9: O << "nge"; break; - case 0xa: O << "ngt"; break; - case 0xb: O << "false"; break; - case 0xc: O << "neq_oq"; break; - case 0xd: O << "ge"; break; - case 0xe: O << "gt"; break; - case 0xf: O << "true"; break; - case 0x10: O << "eq_os"; break; - case 0x11: O << "lt_oq"; break; - case 0x12: O << "le_oq"; break; - case 0x13: O << "unord_s"; break; - case 0x14: O << "neq_us"; break; - case 0x15: O << "nlt_uq"; break; - case 0x16: O << "nle_uq"; break; - case 0x17: O << "ord_s"; break; - case 0x18: O << "eq_us"; break; - case 0x19: O << "nge_uq"; break; - case 0x1a: O << "ngt_uq"; break; - case 0x1b: O << "false_os"; break; - case 0x1c: O << "neq_os"; break; - case 0x1d: O << "ge_oq"; break; - case 0x1e: O << "gt_oq"; break; - case 0x1f: O << "true_us"; break; - } -} - -void X86InstPrinterCommon::printVPCOMMnemonic(const MCInst *MI, - raw_ostream &OS) { - OS << "vpcom"; - - int64_t Imm = MI->getOperand(MI->getNumOperands() - 1).getImm(); - switch (Imm) { - default: llvm_unreachable("Invalid vpcom argument!"); - case 0: OS << "lt"; break; - case 1: OS << "le"; break; - case 2: OS << "gt"; break; - case 3: OS << "ge"; break; - case 4: OS << "eq"; break; - case 5: OS << "neq"; break; - case 6: OS << "false"; break; - case 7: OS << "true"; break; - } - - switch (MI->getOpcode()) { - default: llvm_unreachable("Unexpected opcode!"); - case X86::VPCOMBmi: case X86::VPCOMBri: OS << "b\t"; break; - case X86::VPCOMDmi: case X86::VPCOMDri: OS << "d\t"; break; - case X86::VPCOMQmi: case X86::VPCOMQri: OS << "q\t"; break; - case X86::VPCOMUBmi: case X86::VPCOMUBri: OS << "ub\t"; break; - case X86::VPCOMUDmi: case X86::VPCOMUDri: OS << "ud\t"; break; - case X86::VPCOMUQmi: case X86::VPCOMUQri: OS << "uq\t"; break; - case X86::VPCOMUWmi: case X86::VPCOMUWri: OS << "uw\t"; break; - case X86::VPCOMWmi: case X86::VPCOMWri: OS << "w\t"; break; - } -} - -void X86InstPrinterCommon::printVPCMPMnemonic(const MCInst *MI, - raw_ostream &OS) { - OS << "vpcmp"; - - printSSEAVXCC(MI, MI->getNumOperands() - 1, OS); - - switch (MI->getOpcode()) { - default: llvm_unreachable("Unexpected opcode!"); - case X86::VPCMPBZ128rmi: case X86::VPCMPBZ128rri: - case X86::VPCMPBZ256rmi: case X86::VPCMPBZ256rri: - case X86::VPCMPBZrmi: case X86::VPCMPBZrri: - case X86::VPCMPBZ128rmik: case X86::VPCMPBZ128rrik: - case X86::VPCMPBZ256rmik: case X86::VPCMPBZ256rrik: - case X86::VPCMPBZrmik: case X86::VPCMPBZrrik: - OS << "b\t"; - break; - case X86::VPCMPDZ128rmi: case X86::VPCMPDZ128rri: - case X86::VPCMPDZ256rmi: case X86::VPCMPDZ256rri: - case X86::VPCMPDZrmi: case X86::VPCMPDZrri: - case X86::VPCMPDZ128rmik: case X86::VPCMPDZ128rrik: - case X86::VPCMPDZ256rmik: case X86::VPCMPDZ256rrik: - case X86::VPCMPDZrmik: case X86::VPCMPDZrrik: - case X86::VPCMPDZ128rmib: case X86::VPCMPDZ128rmibk: - case X86::VPCMPDZ256rmib: case X86::VPCMPDZ256rmibk: - case X86::VPCMPDZrmib: case X86::VPCMPDZrmibk: - OS << "d\t"; - break; - case X86::VPCMPQZ128rmi: case X86::VPCMPQZ128rri: - case X86::VPCMPQZ256rmi: case X86::VPCMPQZ256rri: - case X86::VPCMPQZrmi: case X86::VPCMPQZrri: - case X86::VPCMPQZ128rmik: case X86::VPCMPQZ128rrik: - case X86::VPCMPQZ256rmik: case X86::VPCMPQZ256rrik: - case X86::VPCMPQZrmik: case X86::VPCMPQZrrik: - case X86::VPCMPQZ128rmib: case X86::VPCMPQZ128rmibk: - case X86::VPCMPQZ256rmib: case X86::VPCMPQZ256rmibk: - case X86::VPCMPQZrmib: case X86::VPCMPQZrmibk: - OS << "q\t"; - break; - case X86::VPCMPUBZ128rmi: case X86::VPCMPUBZ128rri: - case X86::VPCMPUBZ256rmi: case X86::VPCMPUBZ256rri: - case X86::VPCMPUBZrmi: case X86::VPCMPUBZrri: - case X86::VPCMPUBZ128rmik: case X86::VPCMPUBZ128rrik: - case X86::VPCMPUBZ256rmik: case X86::VPCMPUBZ256rrik: - case X86::VPCMPUBZrmik: case X86::VPCMPUBZrrik: - OS << "ub\t"; - break; - case X86::VPCMPUDZ128rmi: case X86::VPCMPUDZ128rri: - case X86::VPCMPUDZ256rmi: case X86::VPCMPUDZ256rri: - case X86::VPCMPUDZrmi: case X86::VPCMPUDZrri: - case X86::VPCMPUDZ128rmik: case X86::VPCMPUDZ128rrik: - case X86::VPCMPUDZ256rmik: case X86::VPCMPUDZ256rrik: - case X86::VPCMPUDZrmik: case X86::VPCMPUDZrrik: - case X86::VPCMPUDZ128rmib: case X86::VPCMPUDZ128rmibk: - case X86::VPCMPUDZ256rmib: case X86::VPCMPUDZ256rmibk: - case X86::VPCMPUDZrmib: case X86::VPCMPUDZrmibk: - OS << "ud\t"; - break; - case X86::VPCMPUQZ128rmi: case X86::VPCMPUQZ128rri: - case X86::VPCMPUQZ256rmi: case X86::VPCMPUQZ256rri: - case X86::VPCMPUQZrmi: case X86::VPCMPUQZrri: - case X86::VPCMPUQZ128rmik: case X86::VPCMPUQZ128rrik: - case X86::VPCMPUQZ256rmik: case X86::VPCMPUQZ256rrik: - case X86::VPCMPUQZrmik: case X86::VPCMPUQZrrik: - case X86::VPCMPUQZ128rmib: case X86::VPCMPUQZ128rmibk: - case X86::VPCMPUQZ256rmib: case X86::VPCMPUQZ256rmibk: - case X86::VPCMPUQZrmib: case X86::VPCMPUQZrmibk: - OS << "uq\t"; - break; - case X86::VPCMPUWZ128rmi: case X86::VPCMPUWZ128rri: - case X86::VPCMPUWZ256rri: case X86::VPCMPUWZ256rmi: - case X86::VPCMPUWZrmi: case X86::VPCMPUWZrri: - case X86::VPCMPUWZ128rmik: case X86::VPCMPUWZ128rrik: - case X86::VPCMPUWZ256rrik: case X86::VPCMPUWZ256rmik: - case X86::VPCMPUWZrmik: case X86::VPCMPUWZrrik: - OS << "uw\t"; - break; - case X86::VPCMPWZ128rmi: case X86::VPCMPWZ128rri: - case X86::VPCMPWZ256rmi: case X86::VPCMPWZ256rri: - case X86::VPCMPWZrmi: case X86::VPCMPWZrri: - case X86::VPCMPWZ128rmik: case X86::VPCMPWZ128rrik: - case X86::VPCMPWZ256rmik: case X86::VPCMPWZ256rrik: - case X86::VPCMPWZrmik: case X86::VPCMPWZrrik: - OS << "w\t"; - break; - } -} - -void X86InstPrinterCommon::printCMPMnemonic(const MCInst *MI, bool IsVCmp, - raw_ostream &OS) { - OS << (IsVCmp ? "vcmp" : "cmp"); - - printSSEAVXCC(MI, MI->getNumOperands() - 1, OS); - - switch (MI->getOpcode()) { - default: llvm_unreachable("Unexpected opcode!"); - case X86::CMPPDrmi: case X86::CMPPDrri: - case X86::VCMPPDrmi: case X86::VCMPPDrri: - case X86::VCMPPDYrmi: case X86::VCMPPDYrri: - case X86::VCMPPDZ128rmi: case X86::VCMPPDZ128rri: - case X86::VCMPPDZ256rmi: case X86::VCMPPDZ256rri: - case X86::VCMPPDZrmi: case X86::VCMPPDZrri: - case X86::VCMPPDZ128rmik: case X86::VCMPPDZ128rrik: - case X86::VCMPPDZ256rmik: case X86::VCMPPDZ256rrik: - case X86::VCMPPDZrmik: case X86::VCMPPDZrrik: - case X86::VCMPPDZ128rmbi: case X86::VCMPPDZ128rmbik: - case X86::VCMPPDZ256rmbi: case X86::VCMPPDZ256rmbik: - case X86::VCMPPDZrmbi: case X86::VCMPPDZrmbik: - case X86::VCMPPDZrrib: case X86::VCMPPDZrribk: - OS << "pd\t"; - break; - case X86::CMPPSrmi: case X86::CMPPSrri: - case X86::VCMPPSrmi: case X86::VCMPPSrri: - case X86::VCMPPSYrmi: case X86::VCMPPSYrri: - case X86::VCMPPSZ128rmi: case X86::VCMPPSZ128rri: - case X86::VCMPPSZ256rmi: case X86::VCMPPSZ256rri: - case X86::VCMPPSZrmi: case X86::VCMPPSZrri: - case X86::VCMPPSZ128rmik: case X86::VCMPPSZ128rrik: - case X86::VCMPPSZ256rmik: case X86::VCMPPSZ256rrik: - case X86::VCMPPSZrmik: case X86::VCMPPSZrrik: - case X86::VCMPPSZ128rmbi: case X86::VCMPPSZ128rmbik: - case X86::VCMPPSZ256rmbi: case X86::VCMPPSZ256rmbik: - case X86::VCMPPSZrmbi: case X86::VCMPPSZrmbik: - case X86::VCMPPSZrrib: case X86::VCMPPSZrribk: - OS << "ps\t"; - break; - case X86::CMPSDrm: case X86::CMPSDrr: - case X86::CMPSDrm_Int: case X86::CMPSDrr_Int: - case X86::VCMPSDrm: case X86::VCMPSDrr: - case X86::VCMPSDrm_Int: case X86::VCMPSDrr_Int: - case X86::VCMPSDZrm: case X86::VCMPSDZrr: - case X86::VCMPSDZrm_Int: case X86::VCMPSDZrr_Int: - case X86::VCMPSDZrm_Intk: case X86::VCMPSDZrr_Intk: - case X86::VCMPSDZrrb_Int: case X86::VCMPSDZrrb_Intk: - OS << "sd\t"; - break; - case X86::CMPSSrm: case X86::CMPSSrr: - case X86::CMPSSrm_Int: case X86::CMPSSrr_Int: - case X86::VCMPSSrm: case X86::VCMPSSrr: - case X86::VCMPSSrm_Int: case X86::VCMPSSrr_Int: - case X86::VCMPSSZrm: case X86::VCMPSSZrr: - case X86::VCMPSSZrm_Int: case X86::VCMPSSZrr_Int: - case X86::VCMPSSZrm_Intk: case X86::VCMPSSZrr_Intk: - case X86::VCMPSSZrrb_Int: case X86::VCMPSSZrrb_Intk: - OS << "ss\t"; - break; - } -} - -void X86InstPrinterCommon::printRoundingControl(const MCInst *MI, unsigned Op, - raw_ostream &O) { - int64_t Imm = MI->getOperand(Op).getImm(); - switch (Imm) { - default: - llvm_unreachable("Invalid rounding control!"); - case X86::TO_NEAREST_INT: - O << "{rn-sae}"; - break; - case X86::TO_NEG_INF: - O << "{rd-sae}"; - break; - case X86::TO_POS_INF: - O << "{ru-sae}"; - break; - case X86::TO_ZERO: - O << "{rz-sae}"; - break; - } -} - -/// printPCRelImm - This is used to print an immediate value that ends up -/// being encoded as a pc-relative value (e.g. for jumps and calls). In -/// Intel-style these print slightly differently than normal immediates. -/// for example, a $ is not emitted. -void X86InstPrinterCommon::printPCRelImm(const MCInst *MI, unsigned OpNo, - raw_ostream &O) { - const MCOperand &Op = MI->getOperand(OpNo); - if (Op.isImm()) - O << formatImm(Op.getImm()); - else { - assert(Op.isExpr() && "unknown pcrel immediate operand"); - // If a symbolic branch target was added as a constant expression then print - // that address in hex. - const MCConstantExpr *BranchTarget = dyn_cast<MCConstantExpr>(Op.getExpr()); - int64_t Address; - if (BranchTarget && BranchTarget->evaluateAsAbsolute(Address)) { - O << formatHex((uint64_t)Address); - } else { - // Otherwise, just print the expression. - Op.getExpr()->print(O, &MAI); - } - } -} - -void X86InstPrinterCommon::printOptionalSegReg(const MCInst *MI, unsigned OpNo, - raw_ostream &O) { - if (MI->getOperand(OpNo).getReg()) { - printOperand(MI, OpNo, O); - O << ':'; - } -} - -void X86InstPrinterCommon::printInstFlags(const MCInst *MI, raw_ostream &O) { - const MCInstrDesc &Desc = MII.get(MI->getOpcode()); - uint64_t TSFlags = Desc.TSFlags; - unsigned Flags = MI->getFlags(); - - if ((TSFlags & X86II::LOCK) || (Flags & X86::IP_HAS_LOCK)) - O << "\tlock\t"; - - if ((TSFlags & X86II::NOTRACK) || (Flags & X86::IP_HAS_NOTRACK)) - O << "\tnotrack\t"; - - if (Flags & X86::IP_HAS_REPEAT_NE) - O << "\trepne\t"; - else if (Flags & X86::IP_HAS_REPEAT) - O << "\trep\t"; -} diff --git a/llvm/lib/Target/X86/InstPrinter/X86InstPrinterCommon.h b/llvm/lib/Target/X86/InstPrinter/X86InstPrinterCommon.h deleted file mode 100644 index c00d320a8f0..00000000000 --- a/llvm/lib/Target/X86/InstPrinter/X86InstPrinterCommon.h +++ /dev/null @@ -1,40 +0,0 @@ -//===-- X86InstPrinterCommon.cpp - X86 assembly instruction printing ------===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// -// -// This file includes code common for rendering MCInst instances as AT&T-style -// and Intel-style assembly. -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_LIB_TARGET_X86_INSTPRINTER_X86INSTPRINTERCOMMON_H -#define LLVM_LIB_TARGET_X86_INSTPRINTER_X86INSTPRINTERCOMMON_H - -#include "llvm/MC/MCInstPrinter.h" - -namespace llvm { - -class X86InstPrinterCommon : public MCInstPrinter { -public: - using MCInstPrinter::MCInstPrinter; - - virtual void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) = 0; - void printCondCode(const MCInst *MI, unsigned Op, raw_ostream &OS); - void printSSEAVXCC(const MCInst *MI, unsigned Op, raw_ostream &OS); - void printVPCOMMnemonic(const MCInst *MI, raw_ostream &OS); - void printVPCMPMnemonic(const MCInst *MI, raw_ostream &OS); - void printCMPMnemonic(const MCInst *MI, bool IsVCmp, raw_ostream &OS); - void printRoundingControl(const MCInst *MI, unsigned Op, raw_ostream &O); - void printPCRelImm(const MCInst *MI, unsigned OpNo, raw_ostream &O); -protected: - void printInstFlags(const MCInst *MI, raw_ostream &O); - void printOptionalSegReg(const MCInst *MI, unsigned OpNo, raw_ostream &O); -}; - -} // end namespace llvm - -#endif // LLVM_LIB_TARGET_X86_INSTPRINTER_X86ATTINSTPRINTER_H diff --git a/llvm/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp b/llvm/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp deleted file mode 100644 index ba40e13f592..00000000000 --- a/llvm/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp +++ /dev/null @@ -1,445 +0,0 @@ -//===-- X86IntelInstPrinter.cpp - Intel assembly instruction printing -----===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// -// -// This file includes code for rendering MCInst instances as Intel-style -// assembly. -// -//===----------------------------------------------------------------------===// - -#include "X86IntelInstPrinter.h" -#include "MCTargetDesc/X86BaseInfo.h" -#include "X86InstComments.h" -#include "llvm/MC/MCExpr.h" -#include "llvm/MC/MCInst.h" -#include "llvm/MC/MCInstrDesc.h" -#include "llvm/MC/MCInstrInfo.h" -#include "llvm/MC/MCSubtargetInfo.h" -#include "llvm/Support/Casting.h" -#include "llvm/Support/ErrorHandling.h" -#include <cassert> -#include <cstdint> - -using namespace llvm; - -#define DEBUG_TYPE "asm-printer" - -// Include the auto-generated portion of the assembly writer. -#define PRINT_ALIAS_INSTR -#include "X86GenAsmWriter1.inc" - -void X86IntelInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { - OS << getRegisterName(RegNo); -} - -void X86IntelInstPrinter::printInst(const MCInst *MI, raw_ostream &OS, - StringRef Annot, - const MCSubtargetInfo &STI) { - printInstFlags(MI, OS); - - // In 16-bit mode, print data16 as data32. - if (MI->getOpcode() == X86::DATA16_PREFIX && - STI.getFeatureBits()[X86::Mode16Bit]) { - OS << "\tdata32"; - } else if (!printAliasInstr(MI, OS) && - !printVecCompareInstr(MI, OS)) - printInstruction(MI, OS); - - // Next always print the annotation. - printAnnotation(OS, Annot); - - // If verbose assembly is enabled, we can print some informative comments. - if (CommentStream) - EmitAnyX86InstComments(MI, *CommentStream, MII); -} - -bool X86IntelInstPrinter::printVecCompareInstr(const MCInst *MI, raw_ostream &OS) { - if (MI->getNumOperands() == 0 || - !MI->getOperand(MI->getNumOperands() - 1).isImm()) - return false; - - int64_t Imm = MI->getOperand(MI->getNumOperands() - 1).getImm(); - - const MCInstrDesc &Desc = MII.get(MI->getOpcode()); - - // Custom print the vector compare instructions to get the immediate - // translated into the mnemonic. - switch (MI->getOpcode()) { - case X86::CMPPDrmi: case X86::CMPPDrri: - case X86::CMPPSrmi: case X86::CMPPSrri: - case X86::CMPSDrm: case X86::CMPSDrr: - case X86::CMPSDrm_Int: case X86::CMPSDrr_Int: - case X86::CMPSSrm: case X86::CMPSSrr: - case X86::CMPSSrm_Int: case X86::CMPSSrr_Int: - if (Imm >= 0 && Imm <= 7) { - OS << '\t'; - printCMPMnemonic(MI, /*IsVCMP*/false, OS); - printOperand(MI, 0, OS); - OS << ", "; - // Skip operand 1 as its tied to the dest. - - if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) { - if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XS) - printdwordmem(MI, 2, OS); - else if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XD) - printqwordmem(MI, 2, OS); - else - printxmmwordmem(MI, 2, OS); - } else - printOperand(MI, 2, OS); - - return true; - } - break; - - case X86::VCMPPDrmi: case X86::VCMPPDrri: - case X86::VCMPPDYrmi: case X86::VCMPPDYrri: - case X86::VCMPPDZ128rmi: case X86::VCMPPDZ128rri: - case X86::VCMPPDZ256rmi: case X86::VCMPPDZ256rri: - case X86::VCMPPDZrmi: case X86::VCMPPDZrri: - case X86::VCMPPSrmi: case X86::VCMPPSrri: - case X86::VCMPPSYrmi: case X86::VCMPPSYrri: - case X86::VCMPPSZ128rmi: case X86::VCMPPSZ128rri: - case X86::VCMPPSZ256rmi: case X86::VCMPPSZ256rri: - case X86::VCMPPSZrmi: case X86::VCMPPSZrri: - case X86::VCMPSDrm: case X86::VCMPSDrr: - case X86::VCMPSDZrm: case X86::VCMPSDZrr: - case X86::VCMPSDrm_Int: case X86::VCMPSDrr_Int: - case X86::VCMPSDZrm_Int: case X86::VCMPSDZrr_Int: - case X86::VCMPSSrm: case X86::VCMPSSrr: - case X86::VCMPSSZrm: case X86::VCMPSSZrr: - case X86::VCMPSSrm_Int: case X86::VCMPSSrr_Int: - case X86::VCMPSSZrm_Int: case X86::VCMPSSZrr_Int: - case X86::VCMPPDZ128rmik: case X86::VCMPPDZ128rrik: - case X86::VCMPPDZ256rmik: case X86::VCMPPDZ256rrik: - case X86::VCMPPDZrmik: case X86::VCMPPDZrrik: - case X86::VCMPPSZ128rmik: case X86::VCMPPSZ128rrik: - case X86::VCMPPSZ256rmik: case X86::VCMPPSZ256rrik: - case X86::VCMPPSZrmik: case X86::VCMPPSZrrik: - case X86::VCMPSDZrm_Intk: case X86::VCMPSDZrr_Intk: - case X86::VCMPSSZrm_Intk: case X86::VCMPSSZrr_Intk: - case X86::VCMPPDZ128rmbi: case X86::VCMPPDZ128rmbik: - case X86::VCMPPDZ256rmbi: case X86::VCMPPDZ256rmbik: - case X86::VCMPPDZrmbi: case X86::VCMPPDZrmbik: - case X86::VCMPPSZ128rmbi: case X86::VCMPPSZ128rmbik: - case X86::VCMPPSZ256rmbi: case X86::VCMPPSZ256rmbik: - case X86::VCMPPSZrmbi: case X86::VCMPPSZrmbik: - case X86::VCMPPDZrrib: case X86::VCMPPDZrribk: - case X86::VCMPPSZrrib: case X86::VCMPPSZrribk: - case X86::VCMPSDZrrb_Int: case X86::VCMPSDZrrb_Intk: - case X86::VCMPSSZrrb_Int: case X86::VCMPSSZrrb_Intk: - if (Imm >= 0 && Imm <= 31) { - OS << '\t'; - printCMPMnemonic(MI, /*IsVCMP*/true, OS); - - unsigned CurOp = 0; - printOperand(MI, CurOp++, OS); - - if (Desc.TSFlags & X86II::EVEX_K) { - // Print mask operand. - OS << " {"; - printOperand(MI, CurOp++, OS); - OS << "}"; - } - OS << ", "; - printOperand(MI, CurOp++, OS); - OS << ", "; - - if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) { - if (Desc.TSFlags & X86II::EVEX_B) { - // Broadcast form. - // Load size is based on W-bit. - if (Desc.TSFlags & X86II::VEX_W) - printqwordmem(MI, CurOp++, OS); - else - printdwordmem(MI, CurOp++, OS); - - // Print the number of elements broadcasted. - unsigned NumElts; - if (Desc.TSFlags & X86II::EVEX_L2) - NumElts = (Desc.TSFlags & X86II::VEX_W) ? 8 : 16; - else if (Desc.TSFlags & X86II::VEX_L) - NumElts = (Desc.TSFlags & X86II::VEX_W) ? 4 : 8; - else - NumElts = (Desc.TSFlags & X86II::VEX_W) ? 2 : 4; - OS << "{1to" << NumElts << "}"; - } else { - if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XS) - printdwordmem(MI, CurOp++, OS); - else if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XD) - printqwordmem(MI, CurOp++, OS); - else if (Desc.TSFlags & X86II::EVEX_L2) - printzmmwordmem(MI, CurOp++, OS); - else if (Desc.TSFlags & X86II::VEX_L) - printymmwordmem(MI, CurOp++, OS); - else - printxmmwordmem(MI, CurOp++, OS); - } - } else { - printOperand(MI, CurOp++, OS); - if (Desc.TSFlags & X86II::EVEX_B) - OS << ", {sae}"; - } - - return true; - } - break; - - case X86::VPCOMBmi: case X86::VPCOMBri: - case X86::VPCOMDmi: case X86::VPCOMDri: - case X86::VPCOMQmi: case X86::VPCOMQri: - case X86::VPCOMUBmi: case X86::VPCOMUBri: - case X86::VPCOMUDmi: case X86::VPCOMUDri: - case X86::VPCOMUQmi: case X86::VPCOMUQri: - case X86::VPCOMUWmi: case X86::VPCOMUWri: - case X86::VPCOMWmi: case X86::VPCOMWri: - if (Imm >= 0 && Imm <= 7) { - OS << '\t'; - printVPCOMMnemonic(MI, OS); - printOperand(MI, 0, OS); - OS << ", "; - printOperand(MI, 1, OS); - OS << ", "; - if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) - printxmmwordmem(MI, 2, OS); - else - printOperand(MI, 2, OS); - return true; - } - break; - - case X86::VPCMPBZ128rmi: case X86::VPCMPBZ128rri: - case X86::VPCMPBZ256rmi: case X86::VPCMPBZ256rri: - case X86::VPCMPBZrmi: case X86::VPCMPBZrri: - case X86::VPCMPDZ128rmi: case X86::VPCMPDZ128rri: - case X86::VPCMPDZ256rmi: case X86::VPCMPDZ256rri: - case X86::VPCMPDZrmi: case X86::VPCMPDZrri: - case X86::VPCMPQZ128rmi: case X86::VPCMPQZ128rri: - case X86::VPCMPQZ256rmi: case X86::VPCMPQZ256rri: - case X86::VPCMPQZrmi: case X86::VPCMPQZrri: - case X86::VPCMPUBZ128rmi: case X86::VPCMPUBZ128rri: - case X86::VPCMPUBZ256rmi: case X86::VPCMPUBZ256rri: - case X86::VPCMPUBZrmi: case X86::VPCMPUBZrri: - case X86::VPCMPUDZ128rmi: case X86::VPCMPUDZ128rri: - case X86::VPCMPUDZ256rmi: case X86::VPCMPUDZ256rri: - case X86::VPCMPUDZrmi: case X86::VPCMPUDZrri: - case X86::VPCMPUQZ128rmi: case X86::VPCMPUQZ128rri: - case X86::VPCMPUQZ256rmi: case X86::VPCMPUQZ256rri: - case X86::VPCMPUQZrmi: case X86::VPCMPUQZrri: - case X86::VPCMPUWZ128rmi: case X86::VPCMPUWZ128rri: - case X86::VPCMPUWZ256rmi: case X86::VPCMPUWZ256rri: - case X86::VPCMPUWZrmi: case X86::VPCMPUWZrri: - case X86::VPCMPWZ128rmi: case X86::VPCMPWZ128rri: - case X86::VPCMPWZ256rmi: case X86::VPCMPWZ256rri: - case X86::VPCMPWZrmi: case X86::VPCMPWZrri: - case X86::VPCMPBZ128rmik: case X86::VPCMPBZ128rrik: - case X86::VPCMPBZ256rmik: case X86::VPCMPBZ256rrik: - case X86::VPCMPBZrmik: case X86::VPCMPBZrrik: - case X86::VPCMPDZ128rmik: case X86::VPCMPDZ128rrik: - case X86::VPCMPDZ256rmik: case X86::VPCMPDZ256rrik: - case X86::VPCMPDZrmik: case X86::VPCMPDZrrik: - case X86::VPCMPQZ128rmik: case X86::VPCMPQZ128rrik: - case X86::VPCMPQZ256rmik: case X86::VPCMPQZ256rrik: - case X86::VPCMPQZrmik: case X86::VPCMPQZrrik: - case X86::VPCMPUBZ128rmik: case X86::VPCMPUBZ128rrik: - case X86::VPCMPUBZ256rmik: case X86::VPCMPUBZ256rrik: - case X86::VPCMPUBZrmik: case X86::VPCMPUBZrrik: - case X86::VPCMPUDZ128rmik: case X86::VPCMPUDZ128rrik: - case X86::VPCMPUDZ256rmik: case X86::VPCMPUDZ256rrik: - case X86::VPCMPUDZrmik: case X86::VPCMPUDZrrik: - case X86::VPCMPUQZ128rmik: case X86::VPCMPUQZ128rrik: - case X86::VPCMPUQZ256rmik: case X86::VPCMPUQZ256rrik: - case X86::VPCMPUQZrmik: case X86::VPCMPUQZrrik: - case X86::VPCMPUWZ128rmik: case X86::VPCMPUWZ128rrik: - case X86::VPCMPUWZ256rmik: case X86::VPCMPUWZ256rrik: - case X86::VPCMPUWZrmik: case X86::VPCMPUWZrrik: - case X86::VPCMPWZ128rmik: case X86::VPCMPWZ128rrik: - case X86::VPCMPWZ256rmik: case X86::VPCMPWZ256rrik: - case X86::VPCMPWZrmik: case X86::VPCMPWZrrik: - case X86::VPCMPDZ128rmib: case X86::VPCMPDZ128rmibk: - case X86::VPCMPDZ256rmib: case X86::VPCMPDZ256rmibk: - case X86::VPCMPDZrmib: case X86::VPCMPDZrmibk: - case X86::VPCMPQZ128rmib: case X86::VPCMPQZ128rmibk: - case X86::VPCMPQZ256rmib: case X86::VPCMPQZ256rmibk: - case X86::VPCMPQZrmib: case X86::VPCMPQZrmibk: - case X86::VPCMPUDZ128rmib: case X86::VPCMPUDZ128rmibk: - case X86::VPCMPUDZ256rmib: case X86::VPCMPUDZ256rmibk: - case X86::VPCMPUDZrmib: case X86::VPCMPUDZrmibk: - case X86::VPCMPUQZ128rmib: case X86::VPCMPUQZ128rmibk: - case X86::VPCMPUQZ256rmib: case X86::VPCMPUQZ256rmibk: - case X86::VPCMPUQZrmib: case X86::VPCMPUQZrmibk: - if ((Imm >= 0 && Imm <= 2) || (Imm >= 4 && Imm <= 6)) { - OS << '\t'; - printVPCMPMnemonic(MI, OS); - - unsigned CurOp = 0; - printOperand(MI, CurOp++, OS); - - if (Desc.TSFlags & X86II::EVEX_K) { - // Print mask operand. - OS << " {"; - printOperand(MI, CurOp++, OS); - OS << "}"; - } - OS << ", "; - printOperand(MI, CurOp++, OS); - OS << ", "; - - if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) { - if (Desc.TSFlags & X86II::EVEX_B) { - // Broadcast form. - // Load size is based on W-bit as only D and Q are supported. - if (Desc.TSFlags & X86II::VEX_W) - printqwordmem(MI, CurOp++, OS); - else - printdwordmem(MI, CurOp++, OS); - - // Print the number of elements broadcasted. - unsigned NumElts; - if (Desc.TSFlags & X86II::EVEX_L2) - NumElts = (Desc.TSFlags & X86II::VEX_W) ? 8 : 16; - else if (Desc.TSFlags & X86II::VEX_L) - NumElts = (Desc.TSFlags & X86II::VEX_W) ? 4 : 8; - else - NumElts = (Desc.TSFlags & X86II::VEX_W) ? 2 : 4; - OS << "{1to" << NumElts << "}"; - } else { - if (Desc.TSFlags & X86II::EVEX_L2) - printzmmwordmem(MI, CurOp++, OS); - else if (Desc.TSFlags & X86II::VEX_L) - printymmwordmem(MI, CurOp++, OS); - else - printxmmwordmem(MI, CurOp++, OS); - } - } else { - printOperand(MI, CurOp++, OS); - } - - return true; - } - break; - } - - return false; -} - -void X86IntelInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, - raw_ostream &O) { - const MCOperand &Op = MI->getOperand(OpNo); - if (Op.isReg()) { - printRegName(O, Op.getReg()); - } else if (Op.isImm()) { - O << formatImm((int64_t)Op.getImm()); - } else { - assert(Op.isExpr() && "unknown operand kind in printOperand"); - O << "offset "; - Op.getExpr()->print(O, &MAI); - } -} - -void X86IntelInstPrinter::printMemReference(const MCInst *MI, unsigned Op, - raw_ostream &O) { - const MCOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); - unsigned ScaleVal = MI->getOperand(Op+X86::AddrScaleAmt).getImm(); - const MCOperand &IndexReg = MI->getOperand(Op+X86::AddrIndexReg); - const MCOperand &DispSpec = MI->getOperand(Op+X86::AddrDisp); - - // If this has a segment register, print it. - printOptionalSegReg(MI, Op + X86::AddrSegmentReg, O); - - O << '['; - - bool NeedPlus = false; - if (BaseReg.getReg()) { - printOperand(MI, Op+X86::AddrBaseReg, O); - NeedPlus = true; - } - - if (IndexReg.getReg()) { - if (NeedPlus) O << " + "; - if (ScaleVal != 1) - O << ScaleVal << '*'; - printOperand(MI, Op+X86::AddrIndexReg, O); - NeedPlus = true; - } - - if (!DispSpec.isImm()) { - if (NeedPlus) O << " + "; - assert(DispSpec.isExpr() && "non-immediate displacement for LEA?"); - DispSpec.getExpr()->print(O, &MAI); - } else { - int64_t DispVal = DispSpec.getImm(); - if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg())) { - if (NeedPlus) { - if (DispVal > 0) - O << " + "; - else { - O << " - "; - DispVal = -DispVal; - } - } - O << formatImm(DispVal); - } - } - - O << ']'; -} - -void X86IntelInstPrinter::printSrcIdx(const MCInst *MI, unsigned Op, - raw_ostream &O) { - // If this has a segment register, print it. - printOptionalSegReg(MI, Op + 1, O); - O << '['; - printOperand(MI, Op, O); - O << ']'; -} - -void X86IntelInstPrinter::printDstIdx(const MCInst *MI, unsigned Op, - raw_ostream &O) { - // DI accesses are always ES-based. - O << "es:["; - printOperand(MI, Op, O); - O << ']'; -} - -void X86IntelInstPrinter::printMemOffset(const MCInst *MI, unsigned Op, - raw_ostream &O) { - const MCOperand &DispSpec = MI->getOperand(Op); - - // If this has a segment register, print it. - printOptionalSegReg(MI, Op + 1, O); - - O << '['; - - if (DispSpec.isImm()) { - O << formatImm(DispSpec.getImm()); - } else { - assert(DispSpec.isExpr() && "non-immediate displacement?"); - DispSpec.getExpr()->print(O, &MAI); - } - - O << ']'; -} - -void X86IntelInstPrinter::printU8Imm(const MCInst *MI, unsigned Op, - raw_ostream &O) { - if (MI->getOperand(Op).isExpr()) - return MI->getOperand(Op).getExpr()->print(O, &MAI); - - O << formatImm(MI->getOperand(Op).getImm() & 0xff); -} - -void X86IntelInstPrinter::printSTiRegOperand(const MCInst *MI, unsigned OpNo, - raw_ostream &OS) { - const MCOperand &Op = MI->getOperand(OpNo); - unsigned Reg = Op.getReg(); - // Override the default printing to print st(0) instead st. - if (Reg == X86::ST0) - OS << "st(0)"; - else - printRegName(OS, Reg); -} diff --git a/llvm/lib/Target/X86/InstPrinter/X86IntelInstPrinter.h b/llvm/lib/Target/X86/InstPrinter/X86IntelInstPrinter.h deleted file mode 100644 index 1227bafffd0..00000000000 --- a/llvm/lib/Target/X86/InstPrinter/X86IntelInstPrinter.h +++ /dev/null @@ -1,144 +0,0 @@ -//= X86IntelInstPrinter.h - Convert X86 MCInst to assembly syntax -*- C++ -*-=// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// -// -// This class prints an X86 MCInst to Intel style .s file syntax. -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_LIB_TARGET_X86_INSTPRINTER_X86INTELINSTPRINTER_H -#define LLVM_LIB_TARGET_X86_INSTPRINTER_X86INTELINSTPRINTER_H - -#include "X86InstPrinterCommon.h" -#include "llvm/Support/raw_ostream.h" - -namespace llvm { - -class X86IntelInstPrinter final : public X86InstPrinterCommon { -public: - X86IntelInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, - const MCRegisterInfo &MRI) - : X86InstPrinterCommon(MAI, MII, MRI) {} - - void printRegName(raw_ostream &OS, unsigned RegNo) const override; - void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot, - const MCSubtargetInfo &STI) override; - bool printVecCompareInstr(const MCInst *MI, raw_ostream &OS); - - // Autogenerated by tblgen, returns true if we successfully printed an - // alias. - bool printAliasInstr(const MCInst *MI, raw_ostream &OS); - void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx, - unsigned PrintMethodIdx, raw_ostream &O); - - // Autogenerated by tblgen. - void printInstruction(const MCInst *MI, raw_ostream &O); - static const char *getRegisterName(unsigned RegNo); - - void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) override; - void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &O); - void printMemOffset(const MCInst *MI, unsigned OpNo, raw_ostream &O); - void printSrcIdx(const MCInst *MI, unsigned OpNo, raw_ostream &O); - void printDstIdx(const MCInst *MI, unsigned OpNo, raw_ostream &O); - void printU8Imm(const MCInst *MI, unsigned Op, raw_ostream &O); - void printSTiRegOperand(const MCInst *MI, unsigned OpNo, raw_ostream &OS); - - void printanymem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printMemReference(MI, OpNo, O); - } - - void printopaquemem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - printMemReference(MI, OpNo, O); - } - - void printbytemem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - O << "byte ptr "; - printMemReference(MI, OpNo, O); - } - void printwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - O << "word ptr "; - printMemReference(MI, OpNo, O); - } - void printdwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - O << "dword ptr "; - printMemReference(MI, OpNo, O); - } - void printqwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - O << "qword ptr "; - printMemReference(MI, OpNo, O); - } - void printxmmwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - O << "xmmword ptr "; - printMemReference(MI, OpNo, O); - } - void printymmwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - O << "ymmword ptr "; - printMemReference(MI, OpNo, O); - } - void printzmmwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - O << "zmmword ptr "; - printMemReference(MI, OpNo, O); - } - void printtbytemem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - O << "tbyte ptr "; - printMemReference(MI, OpNo, O); - } - - - void printSrcIdx8(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - O << "byte ptr "; - printSrcIdx(MI, OpNo, O); - } - void printSrcIdx16(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - O << "word ptr "; - printSrcIdx(MI, OpNo, O); - } - void printSrcIdx32(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - O << "dword ptr "; - printSrcIdx(MI, OpNo, O); - } - void printSrcIdx64(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - O << "qword ptr "; - printSrcIdx(MI, OpNo, O); - } - void printDstIdx8(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - O << "byte ptr "; - printDstIdx(MI, OpNo, O); - } - void printDstIdx16(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - O << "word ptr "; - printDstIdx(MI, OpNo, O); - } - void printDstIdx32(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - O << "dword ptr "; - printDstIdx(MI, OpNo, O); - } - void printDstIdx64(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - O << "qword ptr "; - printDstIdx(MI, OpNo, O); - } - void printMemOffs8(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - O << "byte ptr "; - printMemOffset(MI, OpNo, O); - } - void printMemOffs16(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - O << "word ptr "; - printMemOffset(MI, OpNo, O); - } - void printMemOffs32(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - O << "dword ptr "; - printMemOffset(MI, OpNo, O); - } - void printMemOffs64(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - O << "qword ptr "; - printMemOffset(MI, OpNo, O); - } -}; - -} // end namespace llvm - -#endif // LLVM_LIB_TARGET_X86_INSTPRINTER_X86INTELINSTPRINTER_H |
