diff options
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp')
-rw-r--r-- | llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp | 28 |
1 files changed, 15 insertions, 13 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp index 1f2c4cecfe5..6303a1638bc 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp @@ -83,16 +83,18 @@ static bool MaybeRewriteToFallthrough(MachineInstr &MI, MachineBasicBlock &MBB, if (&MI != &MBB.back()) return false; - // If the operand isn't stackified, insert a COPY to read the operand and - // stackify it. - MachineOperand &MO = MI.getOperand(0); - unsigned Reg = MO.getReg(); - if (!MFI.isVRegStackified(Reg)) { - unsigned NewReg = MRI.createVirtualRegister(MRI.getRegClass(Reg)); - BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(CopyLocalOpc), NewReg) - .addReg(Reg); - MO.setReg(NewReg); - MFI.stackifyVReg(NewReg); + if (FallthroughOpc != WebAssembly::FALLTHROUGH_RETURN_VOID) { + // If the operand isn't stackified, insert a COPY to read the operand and + // stackify it. + MachineOperand &MO = MI.getOperand(0); + unsigned Reg = MO.getReg(); + if (!MFI.isVRegStackified(Reg)) { + unsigned NewReg = MRI.createVirtualRegister(MRI.getRegClass(Reg)); + BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(CopyLocalOpc), NewReg) + .addReg(Reg); + MO.setReg(NewReg); + MFI.stackifyVReg(NewReg); + } } // Rewrite the return. @@ -188,9 +190,9 @@ bool WebAssemblyPeephole::runOnMachineFunction(MachineFunction &MF) { WebAssembly::COPY_V128); break; case WebAssembly::RETURN_VOID: - if (!DisableWebAssemblyFallthroughReturnOpt && - &MBB == &MF.back() && &MI == &MBB.back()) - MI.setDesc(TII.get(WebAssembly::FALLTHROUGH_RETURN_VOID)); + Changed |= MaybeRewriteToFallthrough( + MI, MBB, MF, MFI, MRI, TII, WebAssembly::FALLTHROUGH_RETURN_VOID, + WebAssembly::INSTRUCTION_LIST_END); break; } |