diff options
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td')
| -rw-r--r-- | llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td index 2ea5c8d97a0..afde9ec63cb 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td @@ -118,6 +118,18 @@ multiclass SIMDBitwise<SDNode node, string name, bits<32> simdop> { defm "" : SIMDBinary<v4i32, "v128", node, name, simdop>; defm "" : SIMDBinary<v2i64, "v128", node, name, simdop>; } +multiclass SIMDNot<ValueType vec_t, PatFrag splat_pat, ValueType lane_t> { + defm NOT_#vec_t : SIMD_I<(outs V128:$dst), (ins V128:$vec), + (outs), (ins), + [(set + (vec_t V128:$dst), + (vec_t (xor + (vec_t V128:$vec), + (vec_t (splat_pat (lane_t -1))) + )) + )], + "v128.not\t$dst, $vec", "v128.not", 62>; +} let Defs = [ARGUMENTS] in { defm "" : ConstVec<v16i8, @@ -203,6 +215,11 @@ defm OR : SIMDBitwise<or, "or", 60>; defm XOR : SIMDBitwise<xor, "xor", 61>; } // isCommutable = 1 +defm "" : SIMDNot<v16i8, splat16, i32>; +defm "" : SIMDNot<v8i16, splat8, i32>; +defm "" : SIMDNot<v4i32, splat4, i32>; +defm "" : SIMDNot<v2i64, splat2, i64>; + } // Defs = [ARGUMENTS] // follow convention of making implicit expansions unsigned |
