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-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp10
1 files changed, 7 insertions, 3 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
index 7b3649b5a09..8f94f305c8a 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
@@ -558,16 +558,20 @@ SDValue WebAssemblyTargetLowering::LowerCopyToReg(SDValue Op,
// need to insert some kind of instruction that can take an FI operand and
// produces a value usable by CopyToReg (i.e. in a vreg). So insert a dummy
// copy_local between Op and its FI operand.
+ SDValue Chain = Op.getOperand(0);
SDLoc DL(Op);
+ unsigned Reg = cast<RegisterSDNode>(Op.getOperand(1))->getReg();
EVT VT = Src.getValueType();
SDValue Copy(
DAG.getMachineNode(VT == MVT::i32 ? WebAssembly::COPY_LOCAL_I32
: WebAssembly::COPY_LOCAL_I64,
DL, VT, Src),
0);
- return DAG.getCopyToReg(Op.getOperand(0), DL,
- cast<RegisterSDNode>(Op.getOperand(1))->getReg(),
- Copy);
+ return Op.getNode()->getNumValues() == 1
+ ? DAG.getCopyToReg(Chain, DL, Reg, Copy)
+ : DAG.getCopyToReg(Chain, DL, Reg, Copy, Op.getNumOperands() == 4
+ ? Op.getOperand(3)
+ : SDValue());
}
return SDValue();
}
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