diff options
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp')
| -rw-r--r-- | llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp | 166 |
1 files changed, 89 insertions, 77 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp index 20482c85446..8dc535445d6 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp @@ -114,8 +114,8 @@ private: // Utility helper routines MVT::SimpleValueType getSimpleType(Type *Ty) { EVT VT = TLI.getValueType(DL, Ty, /*HandleUnknown=*/true); - return VT.isSimple() ? VT.getSimpleVT().SimpleTy : - MVT::INVALID_SIMPLE_VALUE_TYPE; + return VT.isSimple() ? VT.getSimpleVT().SimpleTy + : MVT::INVALID_SIMPLE_VALUE_TYPE; } MVT::SimpleValueType getLegalType(MVT::SimpleValueType VT) { switch (VT) { @@ -155,11 +155,9 @@ private: MVT::SimpleValueType From); unsigned signExtendToI32(unsigned Reg, const Value *V, MVT::SimpleValueType From); - unsigned zeroExtend(unsigned Reg, const Value *V, - MVT::SimpleValueType From, + unsigned zeroExtend(unsigned Reg, const Value *V, MVT::SimpleValueType From, MVT::SimpleValueType To); - unsigned signExtend(unsigned Reg, const Value *V, - MVT::SimpleValueType From, + unsigned signExtend(unsigned Reg, const Value *V, MVT::SimpleValueType From, MVT::SimpleValueType To); unsigned getRegForUnsignedValue(const Value *V); unsigned getRegForSignedValue(const Value *V); @@ -376,14 +374,12 @@ void WebAssemblyFastISel::materializeLoadStoreOperands(Address &Addr) { if (Addr.isRegBase()) { unsigned Reg = Addr.getReg(); if (Reg == 0) { - Reg = createResultReg(Subtarget->hasAddr64() ? - &WebAssembly::I64RegClass : - &WebAssembly::I32RegClass); - unsigned Opc = Subtarget->hasAddr64() ? - WebAssembly::CONST_I64 : - WebAssembly::CONST_I32; + Reg = createResultReg(Subtarget->hasAddr64() ? &WebAssembly::I64RegClass + : &WebAssembly::I32RegClass); + unsigned Opc = Subtarget->hasAddr64() ? WebAssembly::CONST_I64 + : WebAssembly::CONST_I32; BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), Reg) - .addImm(0); + .addImm(0); Addr.setReg(Reg); } } @@ -459,13 +455,13 @@ unsigned WebAssemblyFastISel::zeroExtendToI32(unsigned Reg, const Value *V, unsigned Imm = createResultReg(&WebAssembly::I32RegClass); BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(WebAssembly::CONST_I32), Imm) - .addImm(~(~uint64_t(0) << MVT(From).getSizeInBits())); + .addImm(~(~uint64_t(0) << MVT(From).getSizeInBits())); unsigned Result = createResultReg(&WebAssembly::I32RegClass); BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(WebAssembly::AND_I32), Result) - .addReg(Reg) - .addReg(Imm); + .addReg(Reg) + .addReg(Imm); return Result; } @@ -489,19 +485,19 @@ unsigned WebAssemblyFastISel::signExtendToI32(unsigned Reg, const Value *V, unsigned Imm = createResultReg(&WebAssembly::I32RegClass); BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(WebAssembly::CONST_I32), Imm) - .addImm(32 - MVT(From).getSizeInBits()); + .addImm(32 - MVT(From).getSizeInBits()); unsigned Left = createResultReg(&WebAssembly::I32RegClass); BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(WebAssembly::SHL_I32), Left) - .addReg(Reg) - .addReg(Imm); + .addReg(Reg) + .addReg(Imm); unsigned Right = createResultReg(&WebAssembly::I32RegClass); BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(WebAssembly::SHR_S_I32), Right) - .addReg(Left) - .addReg(Imm); + .addReg(Left) + .addReg(Imm); return Right; } @@ -564,8 +560,7 @@ unsigned WebAssemblyFastISel::getRegForSignedValue(const Value *V) { unsigned WebAssemblyFastISel::getRegForPromotedValue(const Value *V, bool IsSigned) { - return IsSigned ? getRegForSignedValue(V) : - getRegForUnsignedValue(V); + return IsSigned ? getRegForSignedValue(V) : getRegForUnsignedValue(V); } unsigned WebAssemblyFastISel::notValue(unsigned Reg) { @@ -574,15 +569,15 @@ unsigned WebAssemblyFastISel::notValue(unsigned Reg) { unsigned NotReg = createResultReg(&WebAssembly::I32RegClass); BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(WebAssembly::EQZ_I32), NotReg) - .addReg(Reg); + .addReg(Reg); return NotReg; } unsigned WebAssemblyFastISel::copyValue(unsigned Reg) { unsigned ResultReg = createResultReg(MRI.getRegClass(Reg)); - BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, - TII.get(WebAssembly::COPY), ResultReg) - .addReg(Reg); + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(WebAssembly::COPY), + ResultReg) + .addReg(Reg); return ResultReg; } @@ -591,12 +586,11 @@ unsigned WebAssemblyFastISel::fastMaterializeAlloca(const AllocaInst *AI) { FuncInfo.StaticAllocaMap.find(AI); if (SI != FuncInfo.StaticAllocaMap.end()) { - unsigned ResultReg = createResultReg(Subtarget->hasAddr64() ? - &WebAssembly::I64RegClass : - &WebAssembly::I32RegClass); - unsigned Opc = Subtarget->hasAddr64() ? - WebAssembly::COPY_I64 : - WebAssembly::COPY_I32; + unsigned ResultReg = + createResultReg(Subtarget->hasAddr64() ? &WebAssembly::I64RegClass + : &WebAssembly::I32RegClass); + unsigned Opc = + Subtarget->hasAddr64() ? WebAssembly::COPY_I64 : WebAssembly::COPY_I32; BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg) .addFrameIndex(SI->second); return ResultReg; @@ -607,14 +601,13 @@ unsigned WebAssemblyFastISel::fastMaterializeAlloca(const AllocaInst *AI) { unsigned WebAssemblyFastISel::fastMaterializeConstant(const Constant *C) { if (const GlobalValue *GV = dyn_cast<GlobalValue>(C)) { - unsigned ResultReg = createResultReg(Subtarget->hasAddr64() ? - &WebAssembly::I64RegClass : - &WebAssembly::I32RegClass); - unsigned Opc = Subtarget->hasAddr64() ? - WebAssembly::CONST_I64 : - WebAssembly::CONST_I32; + unsigned ResultReg = + createResultReg(Subtarget->hasAddr64() ? &WebAssembly::I64RegClass + : &WebAssembly::I32RegClass); + unsigned Opc = Subtarget->hasAddr64() ? WebAssembly::CONST_I64 + : WebAssembly::CONST_I32; BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg) - .addGlobalAddress(GV); + .addGlobalAddress(GV); return ResultReg; } @@ -701,7 +694,7 @@ bool WebAssemblyFastISel::fastLowerArguments() { } unsigned ResultReg = createResultReg(RC); BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg) - .addImm(i); + .addImm(i); updateValueMap(&Arg, ResultReg); ++i; @@ -720,7 +713,8 @@ bool WebAssemblyFastISel::fastLowerArguments() { } if (!F->getReturnType()->isVoidTy()) { - MVT::SimpleValueType RetTy = getLegalType(getSimpleType(F->getReturnType())); + MVT::SimpleValueType RetTy = + getLegalType(getSimpleType(F->getReturnType())); if (RetTy == MVT::INVALID_SIMPLE_VALUE_TYPE) { MFI->clearParamsAndResults(); return false; @@ -778,33 +772,33 @@ bool WebAssemblyFastISel::selectCall(const Instruction *I) { ResultReg = createResultReg(&WebAssembly::F64RegClass); break; case MVT::v16i8: - Opc = - IsDirect ? WebAssembly::CALL_v16i8 : WebAssembly::PCALL_INDIRECT_v16i8; + Opc = IsDirect ? WebAssembly::CALL_v16i8 + : WebAssembly::PCALL_INDIRECT_v16i8; ResultReg = createResultReg(&WebAssembly::V128RegClass); break; case MVT::v8i16: - Opc = - IsDirect ? WebAssembly::CALL_v8i16 : WebAssembly::PCALL_INDIRECT_v8i16; + Opc = IsDirect ? WebAssembly::CALL_v8i16 + : WebAssembly::PCALL_INDIRECT_v8i16; ResultReg = createResultReg(&WebAssembly::V128RegClass); break; case MVT::v4i32: - Opc = - IsDirect ? WebAssembly::CALL_v4i32 : WebAssembly::PCALL_INDIRECT_v4i32; + Opc = IsDirect ? WebAssembly::CALL_v4i32 + : WebAssembly::PCALL_INDIRECT_v4i32; ResultReg = createResultReg(&WebAssembly::V128RegClass); break; case MVT::v2i64: - Opc = - IsDirect ? WebAssembly::CALL_v2i64 : WebAssembly::PCALL_INDIRECT_v2i64; + Opc = IsDirect ? WebAssembly::CALL_v2i64 + : WebAssembly::PCALL_INDIRECT_v2i64; ResultReg = createResultReg(&WebAssembly::V128RegClass); break; case MVT::v4f32: - Opc = - IsDirect ? WebAssembly::CALL_v4f32 : WebAssembly::PCALL_INDIRECT_v4f32; + Opc = IsDirect ? WebAssembly::CALL_v4f32 + : WebAssembly::PCALL_INDIRECT_v4f32; ResultReg = createResultReg(&WebAssembly::V128RegClass); break; case MVT::v2f64: - Opc = - IsDirect ? WebAssembly::CALL_v2f64 : WebAssembly::PCALL_INDIRECT_v2f64; + Opc = IsDirect ? WebAssembly::CALL_v2f64 + : WebAssembly::PCALL_INDIRECT_v2f64; ResultReg = createResultReg(&WebAssembly::V128RegClass); break; case MVT::ExceptRef: @@ -873,11 +867,11 @@ bool WebAssemblyFastISel::selectSelect(const Instruction *I) { const SelectInst *Select = cast<SelectInst>(I); bool Not; - unsigned CondReg = getRegForI1Value(Select->getCondition(), Not); + unsigned CondReg = getRegForI1Value(Select->getCondition(), Not); if (CondReg == 0) return false; - unsigned TrueReg = getRegForValue(Select->getTrueValue()); + unsigned TrueReg = getRegForValue(Select->getTrueValue()); if (TrueReg == 0) return false; @@ -920,9 +914,9 @@ bool WebAssemblyFastISel::selectSelect(const Instruction *I) { unsigned ResultReg = createResultReg(RC); BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg) - .addReg(TrueReg) - .addReg(FalseReg) - .addReg(CondReg); + .addReg(TrueReg) + .addReg(FalseReg) + .addReg(CondReg); updateValueMap(Select, ResultReg); return true; @@ -1022,7 +1016,8 @@ bool WebAssemblyFastISel::selectICmp(const Instruction *I) { Opc = I32 ? WebAssembly::LE_S_I32 : WebAssembly::LE_S_I64; isSigned = true; break; - default: return false; + default: + return false; } unsigned LHS = getRegForPromotedValue(ICmp->getOperand(0), isSigned); @@ -1230,7 +1225,8 @@ bool WebAssemblyFastISel::selectStore(const Instruction *I) { case MVT::f64: Opc = WebAssembly::STORE_F64; break; - default: return false; + default: + return false; } materializeLoadStoreOperands(Addr); @@ -1295,8 +1291,10 @@ bool WebAssemblyFastISel::selectRet(const Instruction *I) { unsigned Opc; switch (getSimpleType(RV->getType())) { - case MVT::i1: case MVT::i8: - case MVT::i16: case MVT::i32: + case MVT::i1: + case MVT::i8: + case MVT::i16: + case MVT::i32: Opc = WebAssembly::RETURN_I32; break; case MVT::i64: @@ -1329,7 +1327,8 @@ bool WebAssemblyFastISel::selectRet(const Instruction *I) { case MVT::ExceptRef: Opc = WebAssembly::RETURN_EXCEPT_REF; break; - default: return false; + default: + return false; } unsigned Reg; @@ -1359,19 +1358,32 @@ bool WebAssemblyFastISel::fastSelectInstruction(const Instruction *I) { if (selectCall(I)) return true; break; - case Instruction::Select: return selectSelect(I); - case Instruction::Trunc: return selectTrunc(I); - case Instruction::ZExt: return selectZExt(I); - case Instruction::SExt: return selectSExt(I); - case Instruction::ICmp: return selectICmp(I); - case Instruction::FCmp: return selectFCmp(I); - case Instruction::BitCast: return selectBitCast(I); - case Instruction::Load: return selectLoad(I); - case Instruction::Store: return selectStore(I); - case Instruction::Br: return selectBr(I); - case Instruction::Ret: return selectRet(I); - case Instruction::Unreachable: return selectUnreachable(I); - default: break; + case Instruction::Select: + return selectSelect(I); + case Instruction::Trunc: + return selectTrunc(I); + case Instruction::ZExt: + return selectZExt(I); + case Instruction::SExt: + return selectSExt(I); + case Instruction::ICmp: + return selectICmp(I); + case Instruction::FCmp: + return selectFCmp(I); + case Instruction::BitCast: + return selectBitCast(I); + case Instruction::Load: + return selectLoad(I); + case Instruction::Store: + return selectStore(I); + case Instruction::Br: + return selectBr(I); + case Instruction::Ret: + return selectRet(I); + case Instruction::Unreachable: + return selectUnreachable(I); + default: + break; } // Fall back to target-independent instruction selection. |
