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-rw-r--r--llvm/lib/Target/Target.td1
1 files changed, 0 insertions, 1 deletions
diff --git a/llvm/lib/Target/Target.td b/llvm/lib/Target/Target.td
index 0c0d66d753c..1583a93a988 100644
--- a/llvm/lib/Target/Target.td
+++ b/llvm/lib/Target/Target.td
@@ -192,7 +192,6 @@ class Instruction {
bit hasDelaySlot = 0; // Does this instruction have an delay slot?
bit usesCustomDAGSchedInserter = 0; // Pseudo instr needing special help.
bit hasCtrlDep = 0; // Does this instruction r/w ctrl-flow chains?
- bit noResults = 0; // Does this instruction produce no results?
bit isNotDuplicable = 0; // Is it unsafe to duplicate this instruction?
InstrItinClass Itinerary = NoItinerary;// Execution steps used for scheduling.
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