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-rw-r--r--llvm/lib/Target/SystemZ/SystemZPatterns.td6
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZPatterns.td b/llvm/lib/Target/SystemZ/SystemZPatterns.td
index 74cc5f019a8..c442ae0d95d 100644
--- a/llvm/lib/Target/SystemZ/SystemZPatterns.td
+++ b/llvm/lib/Target/SystemZ/SystemZPatterns.td
@@ -79,3 +79,9 @@ multiclass MVCLoadStore<SDPatternOperator load, SDPatternOperator store,
bdaddr12only:$src),
(insn bdaddr12only:$dest, bdaddr12only:$src, length)>;
}
+
+// Record that INSN is a LOAD AND TEST that can be used to compare
+// registers in CLS against zero. The instruction has separate R1 and R2
+// operands, but they must be the same when the instruction is used like this.
+class CompareZeroFP<Instruction insn, RegisterOperand cls>
+ : Pat<(z_cmp cls:$reg, (fpimm0)), (insn cls:$reg, cls:$reg)>;
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