3 files changed, 5 insertions, 15 deletions
diff --git a/llvm/lib/Target/Sparc/Sparc.cpp b/llvm/lib/Target/Sparc/Sparc.cpp
index f5ac9a5babb..03de7397c3a 100644
--- a/llvm/lib/Target/Sparc/Sparc.cpp
+++ b/llvm/lib/Target/Sparc/Sparc.cpp
@@ -116,17 +116,12 @@ FunctionPass *llvm::createSparcMachineCodeDestructionPass() {
 
 
 SparcTargetMachine::SparcTargetMachine(IntrinsicLowering *il)
-  : TargetMachine("UltraSparc-Native", false),
-    IL(il ? il : new DefaultIntrinsicLowering()),
+  : TargetMachine("UltraSparc-Native", il, false),
     schedInfo(*this),
     regInfo(*this),
     frameInfo(*this),
     cacheInfo(*this),
-    jitInfo(*this, *IL) {
-}
-
-SparcTargetMachine::~SparcTargetMachine() {
-  delete IL;
+    jitInfo(*this) {
 }
 
 // addPassesToEmitAssembly - This method controls the entire code generation
@@ -171,7 +166,7 @@ SparcTargetMachine::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out)
     PM.add(new PrintFunctionPass("Input code to instr. selection:\n",
                                  &std::cerr));
 
-  PM.add(createInstructionSelectionPass(*this, *IL));
+  PM.add(createInstructionSelectionPass(*this));
 
   if (!DisableSched)
     PM.add(createInstructionSchedulingWithSSAPass(*this));
@@ -238,7 +233,7 @@ void SparcJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
   //PM.add(createLICMPass());
   //PM.add(createGCSEPass());
 
-  PM.add(createInstructionSelectionPass(TM, IL));
+  PM.add(createInstructionSelectionPass(TM));
 
   PM.add(getRegisterAllocator(TM));
   PM.add(createPrologEpilogInsertionPass());
diff --git a/llvm/lib/Target/Sparc/SparcV9JITInfo.h b/llvm/lib/Target/Sparc/SparcV9JITInfo.h
index d1000fe8da9..b667c5599e4 100644
--- a/llvm/lib/Target/Sparc/SparcV9JITInfo.h
+++ b/llvm/lib/Target/Sparc/SparcV9JITInfo.h
@@ -18,13 +18,11 @@
 
 namespace llvm {
   class TargetMachine;
-  class IntrinsicLowering;
 
   class SparcJITInfo : public TargetJITInfo {
     TargetMachine &TM;
-    IntrinsicLowering &IL;
   public:
-    SparcJITInfo(TargetMachine &tm, IntrinsicLowering &il) : TM(tm), IL(il) {}
+    SparcJITInfo(TargetMachine &tm) : TM(tm) {}
 
     /// addPassesToJITCompile - Add passes to the specified pass manager to
     /// implement a fast dynamic compiler for this target.  Return true if this
diff --git a/llvm/lib/Target/Sparc/SparcV9TargetMachine.h b/llvm/lib/Target/Sparc/SparcV9TargetMachine.h
index 4ebd3dc1698..be50174de72 100644
--- a/llvm/lib/Target/Sparc/SparcV9TargetMachine.h
+++ b/llvm/lib/Target/Sparc/SparcV9TargetMachine.h
@@ -24,10 +24,8 @@
 
 namespace llvm {
   class PassManager;
-  class IntrinsicLowering;
 
 class SparcTargetMachine : public TargetMachine {
-  IntrinsicLowering *IL;
   SparcInstrInfo instrInfo;
   SparcSchedInfo schedInfo;
   SparcRegInfo   regInfo;
@@ -36,7 +34,6 @@ class SparcTargetMachine : public TargetMachine {
   SparcJITInfo   jitInfo;
 public:
   SparcTargetMachine(IntrinsicLowering *IL);
-  ~SparcTargetMachine();
   
   virtual const TargetInstrInfo  &getInstrInfo() const { return instrInfo; }
   virtual const TargetSchedInfo  &getSchedInfo() const { return schedInfo; }