1 files changed, 0 insertions, 209 deletions
diff --git a/llvm/lib/Target/Sparc/LeonPasses.cpp b/llvm/lib/Target/Sparc/LeonPasses.cpp
index ca6a0dc3c2a..5ce00db365a 100644
--- a/llvm/lib/Target/Sparc/LeonPasses.cpp
+++ b/llvm/lib/Target/Sparc/LeonPasses.cpp
@@ -24,39 +24,6 @@ using namespace llvm;
 LEONMachineFunctionPass::LEONMachineFunctionPass(char &ID)
     : MachineFunctionPass(ID) {}
 
-int LEONMachineFunctionPass::GetRegIndexForOperand(MachineInstr &MI,
-                                                   int OperandIndex) {
-  if (MI.getNumOperands() > 0) {
-    if (OperandIndex == LAST_OPERAND) {
-      OperandIndex = MI.getNumOperands() - 1;
-    }
-
-    if (MI.getNumOperands() > (unsigned)OperandIndex &&
-        MI.getOperand(OperandIndex).isReg()) {
-      return (int)MI.getOperand(OperandIndex).getReg();
-    }
-  }
-
-  static int NotFoundIndex = -10;
-  // Return a different number each time to avoid any comparisons between the
-  // values returned.
-  NotFoundIndex -= 10;
-  return NotFoundIndex;
-}
-
-// finds a new free FP register
-// checks also the AllocatedRegisters vector
-int LEONMachineFunctionPass::getUnusedFPRegister(MachineRegisterInfo &MRI) {
-  for (int RegisterIndex = SP::F0; RegisterIndex <= SP::F31; ++RegisterIndex) {
-    if (!MRI.isPhysRegUsed(RegisterIndex) &&
-        !is_contained(UsedRegisters, RegisterIndex)) {
-      return RegisterIndex;
-    }
-  }
-
-  return -1;
-}
-
 //*****************************************************************************
 //**** InsertNOPLoad pass
 //*****************************************************************************
@@ -93,182 +60,6 @@ bool InsertNOPLoad::runOnMachineFunction(MachineFunction &MF) {
   return Modified;
 }
 
-//*****************************************************************************
-//**** FixFSMULD pass
-//*****************************************************************************
-// This pass fixes the incorrectly working FSMULD instruction that exists for
-// some earlier versions of the LEON processor line.
-//
-// The pass should convert the FSMULD operands to double precision in scratch
-// registers, then calculate the result with the FMULD instruction. Therefore,
-// the pass should replace operations of the form:
-// fsmuld %f20,%f21,%f8
-// with the sequence:
-// fstod %f20,%f0
-// fstod %f21,%f2
-// fmuld %f0,%f2,%f8
-//
-char FixFSMULD::ID = 0;
-
-FixFSMULD::FixFSMULD() : LEONMachineFunctionPass(ID) {}
-
-bool FixFSMULD::runOnMachineFunction(MachineFunction &MF) {
-  Subtarget = &MF.getSubtarget<SparcSubtarget>();
-  const TargetInstrInfo &TII = *Subtarget->getInstrInfo();
-  DebugLoc DL = DebugLoc();
-
-  bool Modified = false;
-  for (auto MFI = MF.begin(), E = MF.end(); MFI != E; ++MFI) {
-    MachineBasicBlock &MBB = *MFI;
-    for (auto MBBI = MBB.begin(), E = MBB.end(); MBBI != E; ++MBBI) {
-
-      MachineInstr &MI = *MBBI;
-      unsigned Opcode = MI.getOpcode();
-
-      const int UNASSIGNED_INDEX = -1;
-      int Reg1Index = UNASSIGNED_INDEX;
-      int Reg2Index = UNASSIGNED_INDEX;
-      int Reg3Index = UNASSIGNED_INDEX;
-
-      if (Opcode == SP::FSMULD && MI.getNumOperands() == 3) {
-        // take the registers from fsmuld %f20,%f21,%f8
-        Reg1Index = MI.getOperand(0).getReg();
-        Reg2Index = MI.getOperand(1).getReg();
-        Reg3Index = MI.getOperand(2).getReg();
-      }
-
-      if (Reg1Index != UNASSIGNED_INDEX && Reg2Index != UNASSIGNED_INDEX &&
-          Reg3Index != UNASSIGNED_INDEX) {
-        clearUsedRegisterList();
-        MachineBasicBlock::iterator NMBBI = std::next(MBBI);
-        // Whatever Reg3Index is hasn't been used yet, so we need to reserve it.
-        markRegisterUsed(Reg3Index);
-        const int ScratchReg1Index = getUnusedFPRegister(MF.getRegInfo());
-        markRegisterUsed(ScratchReg1Index);
-        const int ScratchReg2Index = getUnusedFPRegister(MF.getRegInfo());
-        markRegisterUsed(ScratchReg2Index);
-
-        if (ScratchReg1Index == UNASSIGNED_INDEX ||
-            ScratchReg2Index == UNASSIGNED_INDEX) {
-          errs() << "Cannot allocate free scratch registers for the FixFSMULD "
-                    "pass."
-                 << "\n";
-        } else {
-          // create fstod %f20,%f0
-          BuildMI(MBB, MBBI, DL, TII.get(SP::FSTOD))
-              .addReg(ScratchReg1Index)
-              .addReg(Reg1Index);
-
-          // create fstod %f21,%f2
-          BuildMI(MBB, MBBI, DL, TII.get(SP::FSTOD))
-              .addReg(ScratchReg2Index)
-              .addReg(Reg2Index);
-
-          // create fmuld %f0,%f2,%f8
-          BuildMI(MBB, MBBI, DL, TII.get(SP::FMULD))
-              .addReg(Reg3Index)
-              .addReg(ScratchReg1Index)
-              .addReg(ScratchReg2Index);
-
-          MI.eraseFromParent();
-          MBBI = NMBBI;
-
-          Modified = true;
-        }
-      }
-    }
-  }
-
-  return Modified;
-}
-
-//*****************************************************************************
-//**** ReplaceFMULS pass
-//*****************************************************************************
-// This pass fixes the incorrectly working FMULS instruction that exists for
-// some earlier versions of the LEON processor line.
-//
-// This pass converts the FMULS operands to double precision in scratch
-// registers, then calculates the result with the FMULD instruction.
-// The pass should replace operations of the form:
-// fmuls %f20,%f21,%f8
-// with the sequence:
-// fstod %f20,%f0
-// fstod %f21,%f2
-// fmuld %f0,%f2,%f8
-//
-char ReplaceFMULS::ID = 0;
-
-ReplaceFMULS::ReplaceFMULS() : LEONMachineFunctionPass(ID) {}
-
-bool ReplaceFMULS::runOnMachineFunction(MachineFunction &MF) {
-  Subtarget = &MF.getSubtarget<SparcSubtarget>();
-  const TargetInstrInfo &TII = *Subtarget->getInstrInfo();
-  DebugLoc DL = DebugLoc();
-
-  bool Modified = false;
-  for (auto MFI = MF.begin(), E = MF.end(); MFI != E; ++MFI) {
-    MachineBasicBlock &MBB = *MFI;
-    for (auto MBBI = MBB.begin(), E = MBB.end(); MBBI != E; ++MBBI) {
-      MachineInstr &MI = *MBBI;
-      unsigned Opcode = MI.getOpcode();
-
-      const int UNASSIGNED_INDEX = -1;
-      int Reg1Index = UNASSIGNED_INDEX;
-      int Reg2Index = UNASSIGNED_INDEX;
-      int Reg3Index = UNASSIGNED_INDEX;
-
-      if (Opcode == SP::FMULS && MI.getNumOperands() == 3) {
-        // take the registers from fmuls %f20,%f21,%f8
-        Reg1Index = MI.getOperand(0).getReg();
-        Reg2Index = MI.getOperand(1).getReg();
-        Reg3Index = MI.getOperand(2).getReg();
-      }
-
-      if (Reg1Index != UNASSIGNED_INDEX && Reg2Index != UNASSIGNED_INDEX &&
-          Reg3Index != UNASSIGNED_INDEX) {
-        clearUsedRegisterList();
-        MachineBasicBlock::iterator NMBBI = std::next(MBBI);
-        // Whatever Reg3Index is hasn't been used yet, so we need to reserve it.
-        markRegisterUsed(Reg3Index);
-        const int ScratchReg1Index = getUnusedFPRegister(MF.getRegInfo());
-        markRegisterUsed(ScratchReg1Index);
-        const int ScratchReg2Index = getUnusedFPRegister(MF.getRegInfo());
-        markRegisterUsed(ScratchReg2Index);
-
-        if (ScratchReg1Index == UNASSIGNED_INDEX ||
-            ScratchReg2Index == UNASSIGNED_INDEX) {
-          errs() << "Cannot allocate free scratch registers for the "
-                    "ReplaceFMULS pass."
-                 << "\n";
-        } else {
-          // create fstod %f20,%f0
-          BuildMI(MBB, MBBI, DL, TII.get(SP::FSTOD))
-              .addReg(ScratchReg1Index)
-              .addReg(Reg1Index);
-
-          // create fstod %f21,%f2
-          BuildMI(MBB, MBBI, DL, TII.get(SP::FSTOD))
-              .addReg(ScratchReg2Index)
-              .addReg(Reg2Index);
-
-          // create fmuld %f0,%f2,%f8
-          BuildMI(MBB, MBBI, DL, TII.get(SP::FMULD))
-              .addReg(Reg3Index)
-              .addReg(ScratchReg1Index)
-              .addReg(ScratchReg2Index);
-
-          MI.eraseFromParent();
-          MBBI = NMBBI;
-
-          Modified = true;
-        }
-      }
-    }
-  }
-
-  return Modified;
-}
 
 
 //*****************************************************************************