8 files changed, 30 insertions, 13 deletions
diff --git a/llvm/lib/Target/PowerPC/PPC.h b/llvm/lib/Target/PowerPC/PPC.h
index a12dfdfb112..88fc87e3098 100644
--- a/llvm/lib/Target/PowerPC/PPC.h
+++ b/llvm/lib/Target/PowerPC/PPC.h
@@ -20,16 +20,16 @@
 namespace llvm {
 
 class FunctionPass;
-class TargetMachine;
+class PPCTargetMachine;
 
 enum PPCTargetEnum {
   TargetDefault, TargetAIX, TargetDarwin
 };
 
 FunctionPass *createPPCBranchSelectionPass();
-FunctionPass *createPPCISelDag(TargetMachine &TM);
-FunctionPass *createDarwinAsmPrinter(std::ostream &OS, TargetMachine &TM);
-FunctionPass *createAIXAsmPrinter(std::ostream &OS, TargetMachine &TM);
+FunctionPass *createPPCISelDag(PPCTargetMachine &TM);
+FunctionPass *createDarwinAsmPrinter(std::ostream &OS, PPCTargetMachine &TM);
+FunctionPass *createAIXAsmPrinter(std::ostream &OS, PPCTargetMachine &TM);
 
 extern PPCTargetEnum PPCTarget;
 } // end namespace llvm;
diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
index 2b88a855f5c..2b5ff5970e0 100644
--- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -307,7 +307,8 @@ namespace {
 /// code for a MachineFunction to the given output stream, in a format that the
 /// Darwin assembler can deal with.
 ///
-FunctionPass *llvm::createDarwinAsmPrinter(std::ostream &o, TargetMachine &tm) {
+FunctionPass *llvm::createDarwinAsmPrinter(std::ostream &o,
+                                           PPCTargetMachine &tm) {
   return new DarwinAsmPrinter(o, tm);
 }
 
@@ -315,7 +316,7 @@ FunctionPass *llvm::createDarwinAsmPrinter(std::ostream &o, TargetMachine &tm) {
 /// for a MachineFunction to the given output stream, in a format that the
 /// AIX 5L assembler can deal with.
 ///
-FunctionPass *llvm::createAIXAsmPrinter(std::ostream &o, TargetMachine &tm) {
+FunctionPass *llvm::createAIXAsmPrinter(std::ostream &o, PPCTargetMachine &tm) {
   return new AIXAsmPrinter(o, tm);
 }
 
diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 02881433b69..991b088e17c 100644
--- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -42,8 +42,9 @@ namespace {
     PPCTargetLowering PPCLowering;
     unsigned GlobalBaseReg;
   public:
-    PPCDAGToDAGISel(TargetMachine &TM)
-      : SelectionDAGISel(PPCLowering), PPCLowering(TM) {}
+    PPCDAGToDAGISel(PPCTargetMachine &TM)
+      : SelectionDAGISel(PPCLowering),
+        PPCLowering(*TM.getTargetLowering()){}
     
     virtual bool runOnFunction(Function &Fn) {
       // Make sure we re-emit a set of the global base reg if necessary
@@ -1140,7 +1141,7 @@ void PPCDAGToDAGISel::Select(SDOperand &Result, SDOperand Op) {
 /// createPPCISelDag - This pass converts a legalized DAG into a 
 /// PowerPC-specific DAG, ready for instruction scheduling.
 ///
-FunctionPass *llvm::createPPCISelDag(TargetMachine &TM) {
+FunctionPass *llvm::createPPCISelDag(PPCTargetMachine &TM) {
   return new PPCDAGToDAGISel(TM);
 }
 
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index dac58f53680..0590b9ed687 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -14,6 +14,7 @@
 #include "PPCISelLowering.h"
 #include "PPCTargetMachine.h"
 #include "llvm/ADT/VectorExtras.h"
+#include "llvm/Analysis/ScalarEvolutionExpressions.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
@@ -1174,3 +1175,10 @@ isOperandValidForConstraint(SDOperand Op, char Letter) {
   // Handle standard constraint letters.
   return TargetLowering::isOperandValidForConstraint(Op, Letter);
 }
+
+/// isLegalAddressImmediate - Return true if the integer value can be used
+/// as the offset of the target addressing mode.
+bool PPCTargetLowering::isLegalAddressImmediate(int64_t V) const {
+  // PPC allows a sign-extended 16-bit immediate field.
+  return (V > -(1 << 16) && V < (1 << 16)-1);
+}
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.h b/llvm/lib/Target/PowerPC/PPCISelLowering.h
index a89727d2f7b..b406e4e7996 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.h
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.h
@@ -109,6 +109,10 @@ namespace llvm {
       getRegClassForInlineAsmConstraint(const std::string &Constraint,
                                         MVT::ValueType VT) const;
     bool isOperandValidForConstraint(SDOperand Op, char ConstraintLetter);
+
+    /// isLegalAddressImmediate - Return true if the integer value can be used
+    /// as the offset of the target addressing mode.
+    virtual bool isLegalAddressImmediate(int64_t V) const;
   };
 }
 
diff --git a/llvm/lib/Target/PowerPC/PPCJITInfo.h b/llvm/lib/Target/PowerPC/PPCJITInfo.h
index 39a706f0830..245cf9ad902 100644
--- a/llvm/lib/Target/PowerPC/PPCJITInfo.h
+++ b/llvm/lib/Target/PowerPC/PPCJITInfo.h
@@ -17,13 +17,13 @@
 #include "llvm/Target/TargetJITInfo.h"
 
 namespace llvm {
-  class TargetMachine;
+  class PPCTargetMachine;
 
   class PPCJITInfo : public TargetJITInfo {
   protected:
-    TargetMachine &TM;
+    PPCTargetMachine &TM;
   public:
-    PPCJITInfo(TargetMachine &tm) : TM(tm) {useGOT = 0;}
+    PPCJITInfo(PPCTargetMachine &tm) : TM(tm) {useGOT = 0;}
 
     /// addPassesToJITCompile - Add passes to the specified pass manager to
     /// implement a fast dynamic compiler for this target.  Return true if this
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
index ced492ccb95..6fe41ea51ae 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -62,7 +62,7 @@ PPCTargetMachine::PPCTargetMachine(const Module &M, IntrinsicLowering *IL,
                                    const std::string &FS)
 : TargetMachine("PowerPC", IL, false, 4, 4, 4, 4, 4, 4, 2, 1, 1),
   Subtarget(M, FS), FrameInfo(*this, false), JITInfo(*this),
-  InstrItins(Subtarget.getInstrItineraryData()) {
+  TLInfo(*this), InstrItins(Subtarget.getInstrItineraryData()) {
   if (TargetDefault == PPCTarget) {
     if (Subtarget.isAIX()) PPCTarget = TargetAIX;
     if (Subtarget.isDarwin()) PPCTarget = TargetDarwin;
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.h b/llvm/lib/Target/PowerPC/PPCTargetMachine.h
index dff48348de5..4038a2a84fa 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.h
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.h
@@ -18,6 +18,7 @@
 #include "PPCSubtarget.h"
 #include "PPCJITInfo.h"
 #include "PPCInstrInfo.h"
+#include "PPCISelLowering.h"
 #include "llvm/Target/TargetMachine.h"
 
 namespace llvm {
@@ -31,6 +32,7 @@ class PPCTargetMachine : public TargetMachine {
   PPCSubtarget           Subtarget;
   PPCFrameInfo           FrameInfo;
   PPCJITInfo             JITInfo;
+  PPCTargetLowering      TLInfo;
   InstrItineraryData     InstrItins;
 public:
   PPCTargetMachine(const Module &M, IntrinsicLowering *IL,
@@ -40,6 +42,7 @@ public:
   virtual const TargetFrameInfo  *getFrameInfo() const { return &FrameInfo; }
   virtual       TargetJITInfo    *getJITInfo()         { return &JITInfo; }
   virtual const TargetSubtarget  *getSubtargetImpl() const{ return &Subtarget; }
+  virtual       PPCTargetLowering *getTargetLowering() { return &TLInfo; }
   virtual const MRegisterInfo    *getRegisterInfo() const {
     return &InstrInfo.getRegisterInfo();
   }